cpu: add a condition-code register class

Add a third register class for condition codes,
in parallel with the integer and FP classes.
No ISAs use the CC class at this point though.

1 files changed, 7 insertions, 0 deletions

diff --git a/src/arch/alpha/isa.hh b/src/arch/alpha/isa.hh
index e2e2daba8..d30499066 100644
--- a/src/arch/alpha/isa.hh
+++ b/src/arch/alpha/isa.hh
@@ -103,6 +103,13 @@ namespace AlphaISA
             return reg;
         }
 
+        // dummy
+        int
+        flattenCCIndex(int reg)
+        {
+            return reg;
+        }
+
         const Params *params() const;
 
         ISA(Params *p);