Move store conditional result checking from SimpleAtomicCpu write

function into Alpha ISA description.  write now just generically
returns a result value if the res pointer is non-null (which means
we can only provide a res pointer if we expect a valid result
value).

--HG--
extra : convert_revision : fb1c315515787f5fbbf7d1af7e428bdbfe8148b8

1 files changed, 9 insertions, 0 deletions

diff --git a/src/arch/alpha/isa/decoder.isa b/src/arch/alpha/isa/decoder.isa
index 6df47ef7a..1da6a60f1 100644
--- a/src/arch/alpha/isa/decoder.isa
+++ b/src/arch/alpha/isa/decoder.isa
@@ -84,6 +84,9 @@ decode OPCODE default Unknown::unknown() {
                         uint64_t tmp = write_result;
                         // see stq_c
                         Ra = (tmp == 0 || tmp == 1) ? tmp : Ra;
+                        if (tmp == 1) {
+                            xc->setStCondFailures(0);
+                        }
                     }}, mem_flags = LOCKED, inst_flags = IsStoreConditional);
         0x2f: stq_c({{ Mem.uq = Ra; }},
                     {{
@@ -96,6 +99,12 @@ decode OPCODE default Unknown::unknown() {
                         // mailbox access, and we don't update the
                         // result register at all.
                         Ra = (tmp == 0 || tmp == 1) ? tmp : Ra;
+                        if (tmp == 1) {
+                            // clear failure counter... this is
+                            // non-architectural and for debugging
+                            // only.
+                            xc->setStCondFailures(0);
+                        }
                     }}, mem_flags = LOCKED, inst_flags = IsStoreConditional);
     }