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| author | Gabe Black <gblack@eecs.umich.edu> | 2009-04-19 04:25:01 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2009-04-19 04:25:01 -0700 |
| commit | 3e5f4876630169e92b3ad736d747bcba1b79c062 (patch) | |
| tree | cc6f7aa2f13331839567c1b5844ea2d8412df163 /src/arch/alpha/isa/decoder.isa | |
| parent | ca8598147835cc3bf4cb6125b4f32cbd941f1ae7 (diff) | |
| download | gem5-3e5f4876630169e92b3ad736d747bcba1b79c062.tar.xz | |
Memory: Rename LOCKED for load locked store conditional to LLSC.
Diffstat (limited to 'src/arch/alpha/isa/decoder.isa')
| -rw-r--r-- | src/arch/alpha/isa/decoder.isa | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/arch/alpha/isa/decoder.isa b/src/arch/alpha/isa/decoder.isa index 0b2a31410..278ce31e8 100644 --- a/src/arch/alpha/isa/decoder.isa +++ b/src/arch/alpha/isa/decoder.isa @@ -45,8 +45,8 @@ decode OPCODE default Unknown::unknown() { 0x0c: ldwu({{ Ra.uq = Mem.uw; }}); 0x0b: ldq_u({{ Ra = Mem.uq; }}, ea_code = {{ EA = (Rb + disp) & ~7; }}); 0x23: ldt({{ Fa = Mem.df; }}); - 0x2a: ldl_l({{ Ra.sl = Mem.sl; }}, mem_flags = LOCKED); - 0x2b: ldq_l({{ Ra.uq = Mem.uq; }}, mem_flags = LOCKED); + 0x2a: ldl_l({{ Ra.sl = Mem.sl; }}, mem_flags = LLSC); + 0x2b: ldq_l({{ Ra.uq = Mem.uq; }}, mem_flags = LLSC); #ifdef USE_COPY 0x20: MiscPrefetch::copy_load({{ EA = Ra; }}, {{ fault = xc->copySrcTranslate(EA); }}, @@ -87,7 +87,7 @@ decode OPCODE default Unknown::unknown() { if (tmp == 1) { xc->setStCondFailures(0); } - }}, mem_flags = LOCKED, inst_flags = IsStoreConditional); + }}, mem_flags = LLSC, inst_flags = IsStoreConditional); 0x2f: stq_c({{ Mem.uq = Ra; }}, {{ uint64_t tmp = write_result; @@ -105,7 +105,7 @@ decode OPCODE default Unknown::unknown() { // only. xc->setStCondFailures(0); } - }}, mem_flags = LOCKED, inst_flags = IsStoreConditional); + }}, mem_flags = LLSC, inst_flags = IsStoreConditional); } format IntegerOperate { |