there are two main thrusts of this changeset.

1) return the periodicity of checkpoints back into the code (i.e. make m5 checkpoint n m meaningful again).
2) to do this, i had to much around with being able to repeatedly schedule and SimLoopExitEvent, which led to changes in how exit simloop events are handled to make this easier.

src/arch/alpha/isa/decoder.isa:
src/mem/cache/cache_impl.hh:
    modify arg. order for new calling convention of exitSimLoop.
src/cpu/base.cc:
src/sim/main.cc:
src/sim/pseudo_inst.cc:
src/sim/root.cc:
    now, instead of creating a new SimLoopExitEvent, call a wrapper schedExitSimLoop which handles all the default args.
src/sim/sim_events.cc:
src/sim/sim_events.hh:
src/sim/sim_exit.hh:
    add the periodicity of checkpointing back into the code.

    to facilitate this, there are now two wrappers (instead of just overloading exitSimLoop).  exitSimLoop is only for exiting NOW (i.e. at curTick), while schedExitSimLoop schedules and exit event for the future.

--HG--
extra : convert_revision : c61f4bf05517172edd2c83368fd10bb0f0678029

1 files changed, 1 insertions, 1 deletions

diff --git a/src/arch/alpha/isa/decoder.isa b/src/arch/alpha/isa/decoder.isa
index 4fc9da3f3..5bd19b677 100644
--- a/src/arch/alpha/isa/decoder.isa
+++ b/src/arch/alpha/isa/decoder.isa
@@ -701,7 +701,7 @@ decode OPCODE default Unknown::unknown() {
     0x00: decode PALFUNC {
         format EmulatedCallPal {
             0x00: halt ({{
-                exitSimLoop(curTick, "halt instruction encountered");
+                exitSimLoop("halt instruction encountered");
             }}, IsNonSpeculative);
             0x83: callsys({{
                 xc->syscall(R0);