diff options
| author | Ali Saidi <saidi@eecs.umich.edu> | 2007-03-07 15:04:44 -0500 |
|---|---|---|
| committer | Ali Saidi <saidi@eecs.umich.edu> | 2007-03-07 15:04:44 -0500 |
| commit | 49527ab55312bf02dfce20c45db8f173b0c2324e (patch) | |
| tree | b9212b195a7b253940aaaab5c8b9ef27e43d026e /src/arch/alpha/isa/fp.isa | |
| parent | ea7bdf9f60c404761dfc568d5291c75747a2dd88 (diff) | |
| parent | 689cab36c90b56b3c8a7cda16d758acdd89f9de1 (diff) | |
| download | gem5-49527ab55312bf02dfce20c45db8f173b0c2324e.tar.xz | |
Merge zizzer:/bk/newmem
into zeep.pool:/tmp/newmem
--HG--
extra : convert_revision : f078a05729b5fe464a06a58bc4adcb374f560572
Diffstat (limited to 'src/arch/alpha/isa/fp.isa')
| -rw-r--r-- | src/arch/alpha/isa/fp.isa | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/alpha/isa/fp.isa b/src/arch/alpha/isa/fp.isa index c845ea442..a350aa05f 100644 --- a/src/arch/alpha/isa/fp.isa +++ b/src/arch/alpha/isa/fp.isa @@ -46,7 +46,7 @@ output exec {{ inline Fault checkFpEnableFault(%(CPU_exec_context)s *xc) { Fault fault = NoFault; // dummy... this ipr access should not fault - if (!EV5::ICSR_FPE(xc->readMiscRegWithEffect(AlphaISA::IPR_ICSR))) { + if (!EV5::ICSR_FPE(xc->readMiscReg(AlphaISA::IPR_ICSR))) { fault = new FloatEnableFault; } return fault; @@ -229,7 +229,7 @@ def template FloatingPointExecute {{ %(code)s; } else { fesetround(getC99RoundingMode( - xc->readMiscReg(AlphaISA::MISCREG_FPCR))); + xc->readMiscRegNoEffect(AlphaISA::MISCREG_FPCR))); %(code)s; fesetround(FE_TONEAREST); } |