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| author | Nathan Binkert <nate@binkert.org> | 2008-09-27 21:03:47 -0700 |
|---|---|---|
| committer | Nathan Binkert <nate@binkert.org> | 2008-09-27 21:03:47 -0700 |
| commit | 82f5723c7a8b245e1f60190a78b7fe383c2caf9b (patch) | |
| tree | 8e3e2266820d903d9ef313a02fc10967711919a1 /src/arch/alpha/isa/fp.isa | |
| parent | 8ea5176b7f4eac09d152dd63d0ba07962be9c865 (diff) | |
| download | gem5-82f5723c7a8b245e1f60190a78b7fe383c2caf9b.tar.xz | |
alpha: Clean up namespace usage.
Diffstat (limited to 'src/arch/alpha/isa/fp.isa')
| -rw-r--r-- | src/arch/alpha/isa/fp.isa | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/alpha/isa/fp.isa b/src/arch/alpha/isa/fp.isa index 8b13f8dd7..ed04d2a50 100644 --- a/src/arch/alpha/isa/fp.isa +++ b/src/arch/alpha/isa/fp.isa @@ -46,7 +46,7 @@ output exec {{ inline Fault checkFpEnableFault(%(CPU_exec_context)s *xc) { Fault fault = NoFault; // dummy... this ipr access should not fault - if (!AlphaISA::ICSR_FPE(xc->readMiscReg(AlphaISA::IPR_ICSR))) { + if (!ICSR_FPE(xc->readMiscReg(IPR_ICSR))) { fault = new FloatEnableFault; } return fault; @@ -229,7 +229,7 @@ def template FloatingPointExecute {{ %(code)s; } else { m5_fesetround(getC99RoundingMode( - xc->readMiscRegNoEffect(AlphaISA::MISCREG_FPCR))); + xc->readMiscRegNoEffect(MISCREG_FPCR))); %(code)s; m5_fesetround(M5_FE_TONEAREST); } |