Address Translation: Make SE mode use an actual TLB/MMU for translation like FS.

--HG--
extra : convert_revision : a04a30df0b6246e877a1cea35420dbac94b506b1

1 files changed, 5 insertions, 4 deletions

diff --git a/src/arch/alpha/isa_traits.hh b/src/arch/alpha/isa_traits.hh
index 7dc7e5151..53eea5f69 100644
--- a/src/arch/alpha/isa_traits.hh
+++ b/src/arch/alpha/isa_traits.hh
@@ -63,14 +63,13 @@ namespace AlphaISA
     const Addr PageMask = ~(PageBytes - 1);
     const Addr PageOffset = PageBytes - 1;
 
-#if FULL_SYSTEM
 
     ////////////////////////////////////////////////////////////////////////
     //
     //  Translation stuff
     //
 
-   const Addr PteShift = 3;
+    const Addr PteShift = 3;
     const Addr NPtePageShift = PageShift - PteShift;
     const Addr NPtePage = ULL(1) << NPtePageShift;
     const Addr PteMask = NPtePage - 1;
@@ -90,6 +89,8 @@ namespace AlphaISA
     // For loading... XXX This maybe could be USegEnd?? --ali
     const Addr LoadAddrMask = ULL(0xffffffffff);
 
+#if FULL_SYSTEM
+
     ////////////////////////////////////////////////////////////////////////
     //
     //  Interrupt levels
@@ -114,6 +115,8 @@ namespace AlphaISA
         NumInterruptLevels = INTLEVEL_EXTERNAL_MAX
     };
 
+#endif
+
     // EV5 modes
     enum mode_type
     {
@@ -124,8 +127,6 @@ namespace AlphaISA
         mode_number			// number of modes
     };
 
-#endif
-
     // Constants Related to the number of registers
 
     const int NumIntArchRegs = 32;