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authorGabe Black <gblack@eecs.umich.edu>2007-07-26 22:13:14 -0700
committerGabe Black <gblack@eecs.umich.edu>2007-07-26 22:13:14 -0700
commitd1e533a1e243b75b3257e2f96deb385a3b10e09b (patch)
tree5cde70506a663c83efceced11273cca47fed9586 /src/arch/alpha/isa_traits.hh
parent876849724d0e5a990018dc025a8166c5131be567 (diff)
downloadgem5-d1e533a1e243b75b3257e2f96deb385a3b10e09b.tar.xz
X86: Fix argument register indexing.
Code was assuming that all argument registers followed in order from ArgumentReg0. There is now an ArgumentReg array which is indexed to find the right index. There is a constant, NumArgumentRegs, which can be used to protect against using an invalid ArgumentReg. --HG-- extra : convert_revision : f448a3ca4d6adc3fc3323562870f70eec05a8a1f
Diffstat (limited to 'src/arch/alpha/isa_traits.hh')
-rw-r--r--src/arch/alpha/isa_traits.hh12
1 files changed, 5 insertions, 7 deletions
diff --git a/src/arch/alpha/isa_traits.hh b/src/arch/alpha/isa_traits.hh
index a267ac034..7dc7e5151 100644
--- a/src/arch/alpha/isa_traits.hh
+++ b/src/arch/alpha/isa_traits.hh
@@ -156,14 +156,12 @@ namespace AlphaISA
const int ReturnAddressReg = 26;
const int ReturnValueReg = 0;
const int FramePointerReg = 15;
- const int ArgumentReg0 = 16;
- const int ArgumentReg1 = 17;
- const int ArgumentReg2 = 18;
- const int ArgumentReg3 = 19;
- const int ArgumentReg4 = 20;
- const int ArgumentReg5 = 21;
+
+ const int ArgumentReg[] = {16, 17, 18, 19, 20, 21};
+ const int NumArgumentRegs = sizeof(ArgumentReg) / sizeof(const int);
+
const int SyscallNumReg = ReturnValueReg;
- const int SyscallPseudoReturnReg = ArgumentReg4;
+ const int SyscallPseudoReturnReg = ArgumentReg[4];
const int SyscallSuccessReg = 19;
const int LogVMPageSize = 13; // 8K bytes