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| author | Gabe Black <gabeblack@google.com> | 2019-04-24 17:19:23 -0700 |
|---|---|---|
| committer | Gabe Black <gabeblack@google.com> | 2019-04-28 03:09:09 +0000 |
| commit | fce9c7a26f8c8a29d51c319c876a7bf0a32404a7 (patch) | |
| tree | 61cf66e892473fafab9e0e7726750542a0be92b0 /src/arch/alpha/linux/system.cc | |
| parent | cdcc55a6a8fe9b4625b316a8d8845366ccfa71c9 (diff) | |
| download | gem5-fce9c7a26f8c8a29d51c319c876a7bf0a32404a7.tar.xz | |
mem: Remove the ISA specialized versions of port proxy's read/write.
These selected their behavior based on ifdefs and had to be disabled
when on the NULL ISA. The versions which take an explicit endianness
have been renamed to just read/write instead of readGtoH and writeHtoG
since the direction of the translation is obvious from context.
Change-Id: I6cfbfda6c4481962d442d3370534e50532d41814
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18372
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Diffstat (limited to 'src/arch/alpha/linux/system.cc')
| -rw-r--r-- | src/arch/alpha/linux/system.cc | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/arch/alpha/linux/system.cc b/src/arch/alpha/linux/system.cc index 3ecf42f0b..33e760fe5 100644 --- a/src/arch/alpha/linux/system.cc +++ b/src/arch/alpha/linux/system.cc @@ -181,7 +181,8 @@ LinuxAlphaSystem::setDelayLoop(ThreadContext *tc) Tick cpuFreq = tc->getCpuPtr()->frequency(); assert(intrFreq); FSTranslatingPortProxy &vp = tc->getVirtProxy(); - vp.writeHtoG(addr, (uint32_t)((cpuFreq / intrFreq) * 0.9988)); + vp.write(addr, (uint32_t)((cpuFreq / intrFreq) * 0.9988), + GuestByteOrder); } } |