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| author | Gabe Black <gblack@eecs.umich.edu> | 2007-03-07 20:04:45 +0000 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2007-03-07 20:04:45 +0000 |
| commit | 8edc9d79cee3edd6d16a8254a0180aaa242974c7 (patch) | |
| tree | 9ac7148f0862e81210fe929fcd61496ea7216727 /src/arch/alpha/miscregfile.hh | |
| parent | c82251326986affba0224460552236ebfe3447c2 (diff) | |
| parent | 49527ab55312bf02dfce20c45db8f173b0c2324e (diff) | |
| download | gem5-8edc9d79cee3edd6d16a8254a0180aaa242974c7.tar.xz | |
Merge zizzer.eecs.umich.edu:/bk/newmem
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem
--HG--
extra : convert_revision : d764fe37c71269a04fcede6cbf30e24262447e89
Diffstat (limited to 'src/arch/alpha/miscregfile.hh')
| -rw-r--r-- | src/arch/alpha/miscregfile.hh | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/arch/alpha/miscregfile.hh b/src/arch/alpha/miscregfile.hh index 31b3e59b3..aea702849 100644 --- a/src/arch/alpha/miscregfile.hh +++ b/src/arch/alpha/miscregfile.hh @@ -75,18 +75,18 @@ namespace AlphaISA #endif } - MiscReg readReg(int misc_reg); + MiscReg readRegNoEffect(int misc_reg); - MiscReg readRegWithEffect(int misc_reg, ThreadContext *tc); + MiscReg readReg(int misc_reg, ThreadContext *tc); //These functions should be removed once the simplescalar cpu model //has been replaced. int getInstAsid(); int getDataAsid(); - void setReg(int misc_reg, const MiscReg &val); + void setRegNoEffect(int misc_reg, const MiscReg &val); - void setRegWithEffect(int misc_reg, const MiscReg &val, + void setReg(int misc_reg, const MiscReg &val, ThreadContext *tc); void clear() |