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author | Gabe Black <gblack@eecs.umich.edu> | 2006-11-10 05:49:16 -0500 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2006-11-10 05:49:16 -0500 |
commit | 9ef51f2dbaba88c10366d708f0ca872bb39064e4 (patch) | |
tree | 31c5289651249ec05162f814d784b90f8737634a /src/arch/alpha/miscregfile.hh | |
parent | 9731fb3fd72ed2e8f5bf3423a33d45a5c35f636f (diff) | |
download | gem5-9ef51f2dbaba88c10366d708f0ca872bb39064e4.tar.xz |
Actually finished moving the register file stuff around.
--HG--
extra : convert_revision : 786735ecea8ff480db6b3754ac5daa562938d988
Diffstat (limited to 'src/arch/alpha/miscregfile.hh')
-rw-r--r-- | src/arch/alpha/miscregfile.hh | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/arch/alpha/miscregfile.hh b/src/arch/alpha/miscregfile.hh index 85cb054bb..31b3e59b3 100644 --- a/src/arch/alpha/miscregfile.hh +++ b/src/arch/alpha/miscregfile.hh @@ -54,6 +54,11 @@ namespace AlphaISA MISCREG_INTR }; + static inline std::string getMiscRegName(RegIndex) + { + return ""; + } + class MiscRegFile { protected: uint64_t fpcr; // floating point condition codes |