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author | Gabe Black <gblack@eecs.umich.edu> | 2012-05-26 13:44:46 -0700 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2012-05-26 13:44:46 -0700 |
commit | 0cba96ba6a5d7a4dab2a63b14149c49dfbfbb3bc (patch) | |
tree | 1e4e1372b76ed021060d560c2ee1a474f4b22ef0 /src/arch/alpha/predecoder.hh | |
parent | eae1e97fb002b44a9d8c46df2da1ddc1d0156ce4 (diff) | |
download | gem5-0cba96ba6a5d7a4dab2a63b14149c49dfbfbb3bc.tar.xz |
CPU: Merge the predecoder and decoder.
These classes are always used together, and merging them will give the ISAs
more flexibility in how they cache things and manage the process.
--HG--
rename : src/arch/x86/predecoder_tables.cc => src/arch/x86/decoder_tables.cc
Diffstat (limited to 'src/arch/alpha/predecoder.hh')
-rw-r--r-- | src/arch/alpha/predecoder.hh | 113 |
1 files changed, 0 insertions, 113 deletions
diff --git a/src/arch/alpha/predecoder.hh b/src/arch/alpha/predecoder.hh deleted file mode 100644 index a08cddaec..000000000 --- a/src/arch/alpha/predecoder.hh +++ /dev/null @@ -1,113 +0,0 @@ -/* - * Copyright (c) 2006 The Regents of The University of Michigan - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer; - * redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution; - * neither the name of the copyright holders nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black - */ - -#ifndef __ARCH_ALPHA_PREDECODER_HH__ -#define __ARCH_ALPHA_PREDECODER_HH__ - -#include "arch/alpha/types.hh" -#include "base/misc.hh" -#include "base/types.hh" -#include "sim/full_system.hh" - -class ThreadContext; - -namespace AlphaISA { - -class Predecoder -{ - protected: - ThreadContext *tc; - - // The extended machine instruction being generated - ExtMachInst ext_inst; - bool emiIsReady; - - public: - Predecoder(ThreadContext * _tc) - : tc(_tc), emiIsReady(false) - {} - - ThreadContext * - getTC() - { - return tc; - } - - void - setTC(ThreadContext * _tc) - { - tc = _tc; - } - - void - process() - { } - - void - reset() - { - emiIsReady = false; - } - - // Use this to give data to the predecoder. This should be used - // when there is control flow. - void - moreBytes(const PCState &pc, Addr fetchPC, MachInst inst) - { - ext_inst = inst; - emiIsReady = true; - if (FullSystem) - ext_inst |= (static_cast<ExtMachInst>(pc.pc() & 0x1) << 32); - } - - bool - needMoreBytes() - { - return true; - } - - bool - extMachInstReady() - { - return emiIsReady; - } - - // This returns a constant reference to the ExtMachInst to avoid a copy - const ExtMachInst & - getExtMachInst(PCState &pc) - { - emiIsReady = false; - return ext_inst; - } -}; - -} // namespace AlphaISA - -#endif // __ARCH_ALPHA_PREDECODER_HH__ |