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| author | Gabe Black <gblack@eecs.umich.edu> | 2007-08-26 20:24:18 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2007-08-26 20:24:18 -0700 |
| commit | 537239b278f7b8171d2eb09ef7f99c332266c48f (patch) | |
| tree | 31984b63cc542f0a57ca96262477575ab0130c09 /src/arch/alpha/regfile.cc | |
| parent | f738afb865cd82487d6300259d6e87fb50660d2a (diff) | |
| download | gem5-537239b278f7b8171d2eb09ef7f99c332266c48f.tar.xz | |
Address Translation: Make SE mode use an actual TLB/MMU for translation like FS.
--HG--
extra : convert_revision : a04a30df0b6246e877a1cea35420dbac94b506b1
Diffstat (limited to 'src/arch/alpha/regfile.cc')
| -rw-r--r-- | src/arch/alpha/regfile.cc | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/arch/alpha/regfile.cc b/src/arch/alpha/regfile.cc index 3b42ca9bc..2653310d7 100644 --- a/src/arch/alpha/regfile.cc +++ b/src/arch/alpha/regfile.cc @@ -94,8 +94,6 @@ namespace AlphaISA dest->setMiscRegNoEffect(AlphaISA::MISCREG_LOCKADDR, src->readMiscRegNoEffect(AlphaISA::MISCREG_LOCKADDR)); -#if FULL_SYSTEM copyIprs(src, dest); -#endif } } |