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authorGabe Black <gblack@eecs.umich.edu>2007-03-07 20:04:45 +0000
committerGabe Black <gblack@eecs.umich.edu>2007-03-07 20:04:45 +0000
commit8edc9d79cee3edd6d16a8254a0180aaa242974c7 (patch)
tree9ac7148f0862e81210fe929fcd61496ea7216727 /src/arch/alpha/regfile.cc
parentc82251326986affba0224460552236ebfe3447c2 (diff)
parent49527ab55312bf02dfce20c45db8f173b0c2324e (diff)
downloadgem5-8edc9d79cee3edd6d16a8254a0180aaa242974c7.tar.xz
Merge zizzer.eecs.umich.edu:/bk/newmem
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem --HG-- extra : convert_revision : d764fe37c71269a04fcede6cbf30e24262447e89
Diffstat (limited to 'src/arch/alpha/regfile.cc')
-rw-r--r--src/arch/alpha/regfile.cc16
1 files changed, 8 insertions, 8 deletions
diff --git a/src/arch/alpha/regfile.cc b/src/arch/alpha/regfile.cc
index 92e1b07df..3b42ca9bc 100644
--- a/src/arch/alpha/regfile.cc
+++ b/src/arch/alpha/regfile.cc
@@ -85,14 +85,14 @@ namespace AlphaISA
void
copyMiscRegs(ThreadContext *src, ThreadContext *dest)
{
- dest->setMiscReg(AlphaISA::MISCREG_FPCR,
- src->readMiscReg(AlphaISA::MISCREG_FPCR));
- dest->setMiscReg(AlphaISA::MISCREG_UNIQ,
- src->readMiscReg(AlphaISA::MISCREG_UNIQ));
- dest->setMiscReg(AlphaISA::MISCREG_LOCKFLAG,
- src->readMiscReg(AlphaISA::MISCREG_LOCKFLAG));
- dest->setMiscReg(AlphaISA::MISCREG_LOCKADDR,
- src->readMiscReg(AlphaISA::MISCREG_LOCKADDR));
+ dest->setMiscRegNoEffect(AlphaISA::MISCREG_FPCR,
+ src->readMiscRegNoEffect(AlphaISA::MISCREG_FPCR));
+ dest->setMiscRegNoEffect(AlphaISA::MISCREG_UNIQ,
+ src->readMiscRegNoEffect(AlphaISA::MISCREG_UNIQ));
+ dest->setMiscRegNoEffect(AlphaISA::MISCREG_LOCKFLAG,
+ src->readMiscRegNoEffect(AlphaISA::MISCREG_LOCKFLAG));
+ dest->setMiscRegNoEffect(AlphaISA::MISCREG_LOCKADDR,
+ src->readMiscRegNoEffect(AlphaISA::MISCREG_LOCKADDR));
#if FULL_SYSTEM
copyIprs(src, dest);