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author | Gabe Black <gblack@eecs.umich.edu> | 2009-07-08 23:02:21 -0700 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2009-07-08 23:02:21 -0700 |
commit | 6ebce9d65ad5b06decedaab0ce39e0899bcd4d83 (patch) | |
tree | ad46d12f54357f0f82d2673ac15e4e1f0aa331c8 /src/arch/alpha/regfile.hh | |
parent | faa6ebebe1121170778d005b384a21ce6da10308 (diff) | |
download | gem5-6ebce9d65ad5b06decedaab0ce39e0899bcd4d83.tar.xz |
Alpha: Phase out Alpha's intregfile.hh and intregfile.cc.
Diffstat (limited to 'src/arch/alpha/regfile.hh')
-rw-r--r-- | src/arch/alpha/regfile.hh | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/arch/alpha/regfile.hh b/src/arch/alpha/regfile.hh index 113cf225c..accb06302 100644 --- a/src/arch/alpha/regfile.hh +++ b/src/arch/alpha/regfile.hh @@ -32,7 +32,6 @@ #define __ARCH_ALPHA_REGFILE_HH__ #include "arch/alpha/isa_traits.hh" -#include "arch/alpha/intregfile.hh" #include "arch/alpha/miscregfile.hh" #include "arch/alpha/types.hh" #include "arch/alpha/mt.hh" @@ -48,6 +47,9 @@ class ThreadContext; namespace AlphaISA { +// redirected register map, really only used for the full system case. +extern const int reg_redir[NumIntRegs]; + class RegFile { protected: Addr pc; // program counter |