diff options
author | Ali Saidi <saidi@eecs.umich.edu> | 2007-03-07 15:04:31 -0500 |
---|---|---|
committer | Ali Saidi <saidi@eecs.umich.edu> | 2007-03-07 15:04:31 -0500 |
commit | 689cab36c90b56b3c8a7cda16d758acdd89f9de1 (patch) | |
tree | 2f0115320e0a6cfd13e5b054baa0ca13d5655519 /src/arch/alpha/regfile.hh | |
parent | 329db76e47c825d4ecbe0f5251dbcfaf2ec09516 (diff) | |
download | gem5-689cab36c90b56b3c8a7cda16d758acdd89f9de1.tar.xz |
*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg
--HG--
extra : convert_revision : f799b65f1b2a6bf43605e6870b0f39b473dc492b
Diffstat (limited to 'src/arch/alpha/regfile.hh')
-rw-r--r-- | src/arch/alpha/regfile.hh | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/src/arch/alpha/regfile.hh b/src/arch/alpha/regfile.hh index 54372da36..b93707181 100644 --- a/src/arch/alpha/regfile.hh +++ b/src/arch/alpha/regfile.hh @@ -106,25 +106,25 @@ namespace AlphaISA miscRegFile.clear(); } - MiscReg readMiscReg(int miscReg) + MiscReg readMiscRegNoEffect(int miscReg) { - return miscRegFile.readReg(miscReg); + return miscRegFile.readRegNoEffect(miscReg); } - MiscReg readMiscRegWithEffect(int miscReg, ThreadContext *tc) + MiscReg readMiscReg(int miscReg, ThreadContext *tc) { - return miscRegFile.readRegWithEffect(miscReg, tc); + return miscRegFile.readReg(miscReg, tc); } - void setMiscReg(int miscReg, const MiscReg &val) + void setMiscRegNoEffect(int miscReg, const MiscReg &val) { - miscRegFile.setReg(miscReg, val); + miscRegFile.setRegNoEffect(miscReg, val); } - void setMiscRegWithEffect(int miscReg, const MiscReg &val, + void setMiscReg(int miscReg, const MiscReg &val, ThreadContext * tc) { - miscRegFile.setRegWithEffect(miscReg, val, tc); + miscRegFile.setReg(miscReg, val, tc); } FloatReg readFloatReg(int floatReg) |