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authorGabe Black <gblack@eecs.umich.edu>2009-07-08 23:02:20 -0700
committerGabe Black <gblack@eecs.umich.edu>2009-07-08 23:02:20 -0700
commit25884a87733cd35ef6613aaef9a8a08194267552 (patch)
tree3eb831102c76206ba5ba4e19b94810be67ce108f /src/arch/alpha/regfile.hh
parent32daf6fc3fd34af0023ae74c2a1f8dd597f87242 (diff)
downloadgem5-25884a87733cd35ef6613aaef9a8a08194267552.tar.xz
Registers: Get rid of the float register width parameter.
Diffstat (limited to 'src/arch/alpha/regfile.hh')
-rw-r--r--src/arch/alpha/regfile.hh24
1 files changed, 0 insertions, 24 deletions
diff --git a/src/arch/alpha/regfile.hh b/src/arch/alpha/regfile.hh
index 59b76efd5..0a39a94a9 100644
--- a/src/arch/alpha/regfile.hh
+++ b/src/arch/alpha/regfile.hh
@@ -112,24 +112,12 @@ class RegFile {
return floatRegFile.d[floatReg];
}
- FloatReg
- readFloatReg(int floatReg, int width)
- {
- return readFloatReg(floatReg);
- }
-
FloatRegBits
readFloatRegBits(int floatReg)
{
return floatRegFile.q[floatReg];
}
- FloatRegBits
- readFloatRegBits(int floatReg, int width)
- {
- return readFloatRegBits(floatReg);
- }
-
void
setFloatReg(int floatReg, const FloatReg &val)
{
@@ -137,23 +125,11 @@ class RegFile {
}
void
- setFloatReg(int floatReg, const FloatReg &val, int width)
- {
- setFloatReg(floatReg, val);
- }
-
- void
setFloatRegBits(int floatReg, const FloatRegBits &val)
{
floatRegFile.q[floatReg] = val;
}
- void
- setFloatRegBits(int floatReg, const FloatRegBits &val, int width)
- {
- setFloatRegBits(floatReg, val);
- }
-
IntReg
readIntReg(int intReg)
{