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author | Nilay Vaish <nilay@cs.wisc.edu> | 2015-07-28 01:58:04 -0500 |
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committer | Nilay Vaish <nilay@cs.wisc.edu> | 2015-07-28 01:58:04 -0500 |
commit | aafa5c3f86ea54f5e6e88009be656aeec12eef5f (patch) | |
tree | d40f2fd8a807ddc9638f292205754f9ecf19b6ef /src/arch/alpha/registers.hh | |
parent | 608641e23c7f2288810c3f23a1a63790b664f2ab (diff) | |
download | gem5-aafa5c3f86ea54f5e6e88009be656aeec12eef5f.tar.xz |
revert 5af8f40d8f2c
Diffstat (limited to 'src/arch/alpha/registers.hh')
-rw-r--r-- | src/arch/alpha/registers.hh | 10 |
1 files changed, 1 insertions, 9 deletions
diff --git a/src/arch/alpha/registers.hh b/src/arch/alpha/registers.hh index 665ea30c7..3fd774cf7 100644 --- a/src/arch/alpha/registers.hh +++ b/src/arch/alpha/registers.hh @@ -56,12 +56,6 @@ typedef uint64_t MiscReg; // dummy typedef since we don't have CC regs typedef uint8_t CCReg; -// vector register file entry type -typedef uint64_t VectorRegElement; -const int NumVectorRegElements = 0; -const int VectorRegBytes = NumVectorRegElements * sizeof(VectorRegElement); -typedef std::array<VectorRegElement, NumVectorRegElements> VectorReg; - union AnyReg { IntReg intreg; @@ -101,7 +95,6 @@ const int NumFloatArchRegs = 32; const int NumIntRegs = NumIntArchRegs + NumPALShadowRegs; const int NumFloatRegs = NumFloatArchRegs; const int NumCCRegs = 0; -const int NumVectorRegs = 0; const int NumMiscRegs = NUM_MISCREGS; const int TotalNumRegs = @@ -113,8 +106,7 @@ enum DependenceTags { // 32..63 are the FP regs 0..31, i.e. use (reg + FP_Reg_Base) FP_Reg_Base = NumIntRegs, CC_Reg_Base = FP_Reg_Base + NumFloatRegs, - Vector_Reg_Base = CC_Reg_Base + NumCCRegs, // NumCCRegs == 0 - Misc_Reg_Base = Vector_Reg_Base + NumCCRegs, // NumVectorRegs == 0 + Misc_Reg_Base = CC_Reg_Base + NumCCRegs, // NumCCRegs == 0 Max_Reg_Index = Misc_Reg_Base + NumMiscRegs + NumInternalProcRegs }; |