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| author | Nathan Binkert <nate@binkert.org> | 2008-09-27 21:03:47 -0700 |
|---|---|---|
| committer | Nathan Binkert <nate@binkert.org> | 2008-09-27 21:03:47 -0700 |
| commit | 82f5723c7a8b245e1f60190a78b7fe383c2caf9b (patch) | |
| tree | 8e3e2266820d903d9ef313a02fc10967711919a1 /src/arch/alpha/system.cc | |
| parent | 8ea5176b7f4eac09d152dd63d0ba07962be9c865 (diff) | |
| download | gem5-82f5723c7a8b245e1f60190a78b7fe383c2caf9b.tar.xz | |
alpha: Clean up namespace usage.
Diffstat (limited to 'src/arch/alpha/system.cc')
| -rw-r--r-- | src/arch/alpha/system.cc | 13 |
1 files changed, 6 insertions, 7 deletions
diff --git a/src/arch/alpha/system.cc b/src/arch/alpha/system.cc index 63efef4a0..6bff3d798 100644 --- a/src/arch/alpha/system.cc +++ b/src/arch/alpha/system.cc @@ -42,8 +42,7 @@ #include "params/AlphaSystem.hh" #include "sim/byteswap.hh" - -using namespace LittleEndianGuest; +using namespace AlphaISA; AlphaSystem::AlphaSystem(Params *p) : System(p) @@ -67,8 +66,8 @@ AlphaSystem::AlphaSystem(Params *p) // Load program sections into memory - pal->loadSections(&functionalPort, AlphaISA::LoadAddrMask); - console->loadSections(&functionalPort, AlphaISA::LoadAddrMask); + pal->loadSections(&functionalPort, LoadAddrMask); + console->loadSections(&functionalPort, LoadAddrMask); // load symbols if (!console->loadGlobalSymbols(consoleSymtab)) @@ -172,11 +171,11 @@ AlphaSystem::fixFuncEventAddr(Addr addr) const uint32_t gp_lda_pattern = (8 << 26) | (29 << 21) | (29 << 16); uint32_t i1 = virtPort.read<uint32_t>(addr); - uint32_t i2 = virtPort.read<uint32_t>(addr + sizeof(AlphaISA::MachInst)); + uint32_t i2 = virtPort.read<uint32_t>(addr + sizeof(MachInst)); if ((i1 & inst_mask) == gp_ldah_pattern && (i2 & inst_mask) == gp_lda_pattern) { - Addr new_addr = addr + 2* sizeof(AlphaISA::MachInst); + Addr new_addr = addr + 2* sizeof(MachInst); DPRINTF(Loader, "fixFuncEventAddr: %p -> %p", addr, new_addr); return new_addr; } else { @@ -190,7 +189,7 @@ AlphaSystem::setAlphaAccess(Addr access) { Addr addr = 0; if (consoleSymtab->findAddress("m5AlphaAccess", addr)) { - virtPort.write(addr, htog(AlphaISA::Phys2K0Seg(access))); + virtPort.write(addr, htog(Phys2K0Seg(access))); } else panic("could not find m5AlphaAccess\n"); } |