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| author | Korey Sewell <ksewell@umich.edu> | 2009-05-12 15:01:14 -0400 |
|---|---|---|
| committer | Korey Sewell <ksewell@umich.edu> | 2009-05-12 15:01:14 -0400 |
| commit | 2012202b06a620998709f605f8f8692ad718294d (patch) | |
| tree | 43a4817c6889723d480e7c66c0b22cfe022cb0ea /src/arch/alpha/tlb.cc | |
| parent | b569f8f0ed8dcf32347f0d4f68d2d7572a5d1353 (diff) | |
| download | gem5-2012202b06a620998709f605f8f8692ad718294d.tar.xz | |
inorder/alpha-isa: create eaComp object visible to StaticInst through ISA
Remove subinstructions eaComp/memAcc since unused in CPU Models. Instead, create eaComp that is visible from StaticInst object. Gives InOrder model capability of generating address without actually initiating access
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Diffstat (limited to 'src/arch/alpha/tlb.cc')
0 files changed, 0 insertions, 0 deletions