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authorNathan Binkert <nate@binkert.org>2009-04-08 22:21:27 -0700
committerNathan Binkert <nate@binkert.org>2009-04-08 22:21:27 -0700
commite0de2c34433be76eac7798e58e1ae02f5bffb732 (patch)
tree120f809cf3feb35e6b42e83a9896b8ae673c5445 /src/arch/alpha/tlb.hh
parent7b5a96f06b530db35637aca6f9d0f7a2ddfa6e60 (diff)
downloadgem5-e0de2c34433be76eac7798e58e1ae02f5bffb732.tar.xz
tlb: More fixing of unified TLB
Diffstat (limited to 'src/arch/alpha/tlb.hh')
-rw-r--r--src/arch/alpha/tlb.hh6
1 files changed, 2 insertions, 4 deletions
diff --git a/src/arch/alpha/tlb.hh b/src/arch/alpha/tlb.hh
index 292ba15f4..b84c26451 100644
--- a/src/arch/alpha/tlb.hh
+++ b/src/arch/alpha/tlb.hh
@@ -141,11 +141,9 @@ class TLB : public BaseTLB
Fault translateInst(RequestPtr req, ThreadContext *tc);
public:
- Fault translateAtomic(RequestPtr req, ThreadContext *tc,
- bool write = false, bool execute = false);
+ Fault translateAtomic(RequestPtr req, ThreadContext *tc, Mode mode);
void translateTiming(RequestPtr req, ThreadContext *tc,
- Translation *translation,
- bool write = false, bool execute = false);
+ Translation *translation, Mode mode);
};
} // namespace AlphaISA