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| author | Derek Hower <drh5@cs.wisc.edu> | 2009-07-13 14:49:51 -0500 |
|---|---|---|
| committer | Derek Hower <drh5@cs.wisc.edu> | 2009-07-13 14:49:51 -0500 |
| commit | 100da6b3267b4e3d6834cd872502b8303d289d17 (patch) | |
| tree | 1a1427989468e5b6e5f8a1c1c7bb96b3bbdb6f2c /src/arch/alpha/utility.cc | |
| parent | d51445490d9f7ccd09d7003f4360044422bd7b57 (diff) | |
| parent | 60577eb4caff66a756f260bff6bf3bf8cb7edcba (diff) | |
| download | gem5-100da6b3267b4e3d6834cd872502b8303d289d17.tar.xz | |
merge
Diffstat (limited to 'src/arch/alpha/utility.cc')
| -rw-r--r-- | src/arch/alpha/utility.cc | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/src/arch/alpha/utility.cc b/src/arch/alpha/utility.cc index 763da0d4f..0d865e520 100644 --- a/src/arch/alpha/utility.cc +++ b/src/arch/alpha/utility.cc @@ -29,6 +29,7 @@ * Ali Saidi */ +#include "arch/alpha/ev5.hh" #include "arch/alpha/utility.hh" #if FULL_SYSTEM @@ -61,5 +62,39 @@ getArgument(ThreadContext *tc, int number, bool fp) #endif } +void +copyRegs(ThreadContext *src, ThreadContext *dest) +{ + // First loop through the integer registers. + for (int i = 0; i < NumIntRegs; ++i) + dest->setIntReg(i, src->readIntReg(i)); + + // Then loop through the floating point registers. + for (int i = 0; i < NumFloatRegs; ++i) + dest->setFloatRegBits(i, src->readFloatRegBits(i)); + + // Copy misc. registers + copyMiscRegs(src, dest); + + // Lastly copy PC/NPC + dest->setPC(src->readPC()); + dest->setNextPC(src->readNextPC()); +} + +void +copyMiscRegs(ThreadContext *src, ThreadContext *dest) +{ + dest->setMiscRegNoEffect(MISCREG_FPCR, + src->readMiscRegNoEffect(MISCREG_FPCR)); + dest->setMiscRegNoEffect(MISCREG_UNIQ, + src->readMiscRegNoEffect(MISCREG_UNIQ)); + dest->setMiscRegNoEffect(MISCREG_LOCKFLAG, + src->readMiscRegNoEffect(MISCREG_LOCKFLAG)); + dest->setMiscRegNoEffect(MISCREG_LOCKADDR, + src->readMiscRegNoEffect(MISCREG_LOCKADDR)); + + copyIprs(src, dest); +} + } // namespace AlphaISA |