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| author | Ali Saidi <saidi@eecs.umich.edu> | 2007-03-09 16:56:52 -0500 |
|---|---|---|
| committer | Ali Saidi <saidi@eecs.umich.edu> | 2007-03-09 16:56:52 -0500 |
| commit | dc4d47bad4f95501ebd144dc4aa53aa17563abcc (patch) | |
| tree | b4e4a4f0f180468e7d4b5861165176d439229a50 /src/arch/alpha/utility.hh | |
| parent | ad4483490785236f49b009f0d7ef3328abaf8cc5 (diff) | |
| parent | 58f69391cac4dcc3696470d08756d0c5ff308963 (diff) | |
| download | gem5-dc4d47bad4f95501ebd144dc4aa53aa17563abcc.tar.xz | |
Merge zizzer:/bk/newmem
into zeep.pool:/z/saidi/work/m5.newmem
--HG--
extra : convert_revision : 5804298706ac0f04fbe491326af71ce9ab74425a
Diffstat (limited to 'src/arch/alpha/utility.hh')
| -rw-r--r-- | src/arch/alpha/utility.hh | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/arch/alpha/utility.hh b/src/arch/alpha/utility.hh index c8a50e8a2..b7844c7eb 100644 --- a/src/arch/alpha/utility.hh +++ b/src/arch/alpha/utility.hh @@ -123,6 +123,9 @@ namespace AlphaISA // Alpha IPR register accessors inline bool PcPAL(Addr addr) { return addr & 0x3; } + inline void startupCPU(ThreadContext *tc, int cpuId) { + tc->activate(0); + } #if FULL_SYSTEM //////////////////////////////////////////////////////////////////////// |