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authorGabe Black <gblack@eecs.umich.edu>2007-08-26 20:24:18 -0700
committerGabe Black <gblack@eecs.umich.edu>2007-08-26 20:24:18 -0700
commit537239b278f7b8171d2eb09ef7f99c332266c48f (patch)
tree31984b63cc542f0a57ca96262477575ab0130c09 /src/arch/alpha/utility.hh
parentf738afb865cd82487d6300259d6e87fb50660d2a (diff)
downloadgem5-537239b278f7b8171d2eb09ef7f99c332266c48f.tar.xz
Address Translation: Make SE mode use an actual TLB/MMU for translation like FS.
--HG-- extra : convert_revision : a04a30df0b6246e877a1cea35420dbac94b506b1
Diffstat (limited to 'src/arch/alpha/utility.hh')
-rw-r--r--src/arch/alpha/utility.hh4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/alpha/utility.hh b/src/arch/alpha/utility.hh
index 5d461a0f9..11357bc44 100644
--- a/src/arch/alpha/utility.hh
+++ b/src/arch/alpha/utility.hh
@@ -115,7 +115,6 @@ namespace AlphaISA
inline void startupCPU(ThreadContext *tc, int cpuId) {
tc->activate(0);
}
-#if FULL_SYSTEM
////////////////////////////////////////////////////////////////////////
//
@@ -142,8 +141,9 @@ namespace AlphaISA
RoundPage(Addr addr)
{ return (addr + PageBytes - 1) & ~(PageBytes - 1); }
- void initCPU(ThreadContext *tc, int cpuId);
void initIPRs(ThreadContext *tc, int cpuId);
+#if FULL_SYSTEM
+ void initCPU(ThreadContext *tc, int cpuId);
/**
* Function to check for and process any interrupts.