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authorGabe Black <gblack@eecs.umich.edu>2010-11-15 19:37:03 -0800
committerGabe Black <gblack@eecs.umich.edu>2010-11-15 19:37:03 -0800
commit8b9b85e92cde81ef9eb0cf6595be59c96fd13f97 (patch)
treecf5a39118cebc1595f27072b26dd3dd6b3a2e140 /src/arch/alpha
parent776c07591797ccd103619de111ec27df04f96bb3 (diff)
downloadgem5-8b9b85e92cde81ef9eb0cf6595be59c96fd13f97.tar.xz
O3: Make O3 support variably lengthed instructions.
Diffstat (limited to 'src/arch/alpha')
-rw-r--r--src/arch/alpha/predecoder.hh11
1 files changed, 8 insertions, 3 deletions
diff --git a/src/arch/alpha/predecoder.hh b/src/arch/alpha/predecoder.hh
index f9a716b7f..a8788051f 100644
--- a/src/arch/alpha/predecoder.hh
+++ b/src/arch/alpha/predecoder.hh
@@ -47,10 +47,11 @@ class Predecoder
// The extended machine instruction being generated
ExtMachInst ext_inst;
+ bool emiIsReady;
public:
Predecoder(ThreadContext * _tc)
- : tc(_tc)
+ : tc(_tc), emiIsReady(false)
{}
ThreadContext *
@@ -71,7 +72,9 @@ class Predecoder
void
reset()
- { }
+ {
+ emiIsReady = false;
+ }
// Use this to give data to the predecoder. This should be used
// when there is control flow.
@@ -79,6 +82,7 @@ class Predecoder
moreBytes(const PCState &pc, Addr fetchPC, MachInst inst)
{
ext_inst = inst;
+ emiIsReady = true;
#if FULL_SYSTEM
ext_inst |= (static_cast<ExtMachInst>(pc.pc() & 0x1) << 32);
#endif
@@ -93,13 +97,14 @@ class Predecoder
bool
extMachInstReady()
{
- return true;
+ return emiIsReady;
}
// This returns a constant reference to the ExtMachInst to avoid a copy
const ExtMachInst &
getExtMachInst(PCState &pc)
{
+ emiIsReady = false;
return ext_inst;
}
};