diff options
author | Gabe Black <gblack@eecs.umich.edu> | 2007-05-18 13:36:47 -0700 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2007-05-18 13:36:47 -0700 |
commit | a13d5af274a1847eaad649af226e643e86a3322d (patch) | |
tree | 6b3bdd0b269802b324b4744e6ed8362d1917e1a0 /src/arch/alpha | |
parent | 6a6e62014ec72f9dd29a42c3e92fbc91d6b1f648 (diff) | |
parent | a8278c3bde2ba9abc2820afafa9d0e766e36b2c8 (diff) | |
download | gem5-a13d5af274a1847eaad649af226e643e86a3322d.tar.xz |
Merge zizzer.eecs.umich.edu:/bk/newmem
into doughnut.mwconnections.com:/home/gblack/m5/newmem-x86
--HG--
extra : convert_revision : 3f17fc418ee5a30da2b08a515fb394cc8fcdd237
Diffstat (limited to 'src/arch/alpha')
-rw-r--r-- | src/arch/alpha/ev5.cc | 14 | ||||
-rw-r--r-- | src/arch/alpha/floatregfile.hh | 4 | ||||
-rw-r--r-- | src/arch/alpha/intregfile.hh | 4 | ||||
-rw-r--r-- | src/arch/alpha/isa/fp.isa | 12 | ||||
-rw-r--r-- | src/arch/alpha/tlb.cc | 8 |
5 files changed, 21 insertions, 21 deletions
diff --git a/src/arch/alpha/ev5.cc b/src/arch/alpha/ev5.cc index ec5090eb8..86b8fd2d0 100644 --- a/src/arch/alpha/ev5.cc +++ b/src/arch/alpha/ev5.cc @@ -245,13 +245,13 @@ AlphaISA::MiscRegFile::readIpr(int idx, ThreadContext *tc) { AlphaISA::PTE &pte = tc->getDTBPtr()->index(!tc->misspeculating()); - retval |= ((u_int64_t)pte.ppn & ULL(0x7ffffff)) << 32; - retval |= ((u_int64_t)pte.xre & ULL(0xf)) << 8; - retval |= ((u_int64_t)pte.xwe & ULL(0xf)) << 12; - retval |= ((u_int64_t)pte.fonr & ULL(0x1)) << 1; - retval |= ((u_int64_t)pte.fonw & ULL(0x1))<< 2; - retval |= ((u_int64_t)pte.asma & ULL(0x1)) << 4; - retval |= ((u_int64_t)pte.asn & ULL(0x7f)) << 57; + retval |= ((uint64_t)pte.ppn & ULL(0x7ffffff)) << 32; + retval |= ((uint64_t)pte.xre & ULL(0xf)) << 8; + retval |= ((uint64_t)pte.xwe & ULL(0xf)) << 12; + retval |= ((uint64_t)pte.fonr & ULL(0x1)) << 1; + retval |= ((uint64_t)pte.fonw & ULL(0x1))<< 2; + retval |= ((uint64_t)pte.asma & ULL(0x1)) << 4; + retval |= ((uint64_t)pte.asn & ULL(0x7f)) << 57; } break; diff --git a/src/arch/alpha/floatregfile.hh b/src/arch/alpha/floatregfile.hh index d289f5785..0c5fe17a7 100644 --- a/src/arch/alpha/floatregfile.hh +++ b/src/arch/alpha/floatregfile.hh @@ -35,7 +35,7 @@ #include "arch/alpha/isa_traits.hh" #include "arch/alpha/types.hh" -#include <string.h> +#include <cstring> #include <iostream> class Checkpoint; @@ -61,7 +61,7 @@ namespace AlphaISA void unserialize(Checkpoint *cp, const std::string §ion); void clear() - { bzero(d, sizeof(d)); } + { std::memset(d, 0, sizeof(d)); } }; } diff --git a/src/arch/alpha/intregfile.hh b/src/arch/alpha/intregfile.hh index 0d65f69e0..dea160992 100644 --- a/src/arch/alpha/intregfile.hh +++ b/src/arch/alpha/intregfile.hh @@ -35,7 +35,7 @@ #include "arch/alpha/types.hh" #include <iostream> -#include <strings.h> +#include <cstring> class Checkpoint; @@ -71,7 +71,7 @@ namespace AlphaISA void unserialize(Checkpoint *cp, const std::string §ion); void clear() - { bzero(regs, sizeof(regs)); } + { std::memset(regs, 0, sizeof(regs)); } }; } diff --git a/src/arch/alpha/isa/fp.isa b/src/arch/alpha/isa/fp.isa index a350aa05f..773e7d10c 100644 --- a/src/arch/alpha/isa/fp.isa +++ b/src/arch/alpha/isa/fp.isa @@ -192,10 +192,10 @@ output decoder {{ } const int AlphaFP::alphaToC99RoundingMode[] = { - FE_TOWARDZERO, // Chopped - FE_DOWNWARD, // Minus_Infinity - FE_TONEAREST, // Normal - FE_UPWARD // Dynamic in inst, Plus_Infinity in FPCR + M5_FE_TOWARDZERO, // Chopped + M5_FE_DOWNWARD, // Minus_Infinity + M5_FE_TONEAREST, // Normal + M5_FE_UPWARD // Dynamic in inst, Plus_Infinity in FPCR }; const char *AlphaFP::roundingModeSuffix[] = { "c", "m", "", "d" }; @@ -228,10 +228,10 @@ def template FloatingPointExecute {{ if (roundingMode == Normal) { %(code)s; } else { - fesetround(getC99RoundingMode( + m5_fesetround(getC99RoundingMode( xc->readMiscRegNoEffect(AlphaISA::MISCREG_FPCR))); %(code)s; - fesetround(FE_TONEAREST); + m5_fesetround(M5_FE_TONEAREST); } #else if (roundingMode != Normal && !warnedOnRounding) { diff --git a/src/arch/alpha/tlb.cc b/src/arch/alpha/tlb.cc index e9f126f12..714bca22a 100644 --- a/src/arch/alpha/tlb.cc +++ b/src/arch/alpha/tlb.cc @@ -213,7 +213,7 @@ TLB::flushAddr(Addr addr, uint8_t asn) if (i == lookupTable.end()) return; - while (i->first == vaddr.vpn()) { + while (i != lookupTable.end() && i->first == vaddr.vpn()) { int index = i->second; PTE *pte = &table[index]; assert(pte->valid); @@ -225,10 +225,10 @@ TLB::flushAddr(Addr addr, uint8_t asn) // invalidate this entry pte->valid = false; - lookupTable.erase(i); + lookupTable.erase(i++); + } else { + ++i; } - - ++i; } } |