Merge zizzer.eecs.umich.edu:/bk/newmem

into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

src/cpu/simple/base.cc:
    Hand merge

--HG--
extra : convert_revision : a2902ef9d917d22ffb9c7dfa2fd444694a65240d

3 files changed, 97 insertions, 0 deletions

diff --git a/src/arch/alpha/AlphaSystem.py b/src/arch/alpha/AlphaSystem.py
new file mode 100644
index 000000000..a19aeb763
--- /dev/null
+++ b/src/arch/alpha/AlphaSystem.py
@@ -0,0 +1,52 @@
+# Copyright (c) 2007 The Regents of The University of Michigan
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Nathan Binkert
+
+from m5.params import *
+from System import System
+
+class AlphaSystem(System):
+    type = 'AlphaSystem'
+    console = Param.String("file that contains the console code")
+    pal = Param.String("file that contains palcode")
+    system_type = Param.UInt64("Type of system we are emulating")
+    system_rev = Param.UInt64("Revision of system we are emulating")
+
+class LinuxAlphaSystem(AlphaSystem):
+    type = 'LinuxAlphaSystem'
+    system_type = 34
+    system_rev = 1 << 10
+
+class FreebsdAlphaSystem(AlphaSystem):
+    type = 'FreebsdAlphaSystem'
+    system_type = 34
+    system_rev = 1 << 10
+
+class Tru64AlphaSystem(AlphaSystem):
+    type = 'Tru64AlphaSystem'
+    system_type = 12
+    system_rev = 2<<1
diff --git a/src/arch/alpha/AlphaTLB.py b/src/arch/alpha/AlphaTLB.py
new file mode 100644
index 000000000..559516725
--- /dev/null
+++ b/src/arch/alpha/AlphaTLB.py
@@ -0,0 +1,42 @@
+# Copyright (c) 2005-2007 The Regents of The University of Michigan
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Nathan Binkert
+
+from m5.SimObject import SimObject
+from m5.params import *
+class AlphaTLB(SimObject):
+    type = 'AlphaTLB'
+    abstract = True
+    size = Param.Int("TLB size")
+
+class AlphaDTB(AlphaTLB):
+    type = 'AlphaDTB'
+    size = 64
+
+class AlphaITB(AlphaTLB):
+    type = 'AlphaITB'
+    size = 48
diff --git a/src/arch/alpha/SConscript b/src/arch/alpha/SConscript
index 61611e9f6..2d59180c4 100644
--- a/src/arch/alpha/SConscript
+++ b/src/arch/alpha/SConscript
@@ -40,6 +40,9 @@ if env['TARGET_ISA'] == 'alpha':
     Source('remote_gdb.cc')
 
     if env['FULL_SYSTEM']:
+        SimObject('AlphaSystem.py')
+        SimObject('AlphaTLB.py')
+
         Source('arguments.cc')
         Source('ev5.cc')
         Source('idle_event.cc')