diff options
author | Gabe Black <gblack@eecs.umich.edu> | 2012-01-29 02:04:34 -0800 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2012-01-29 02:04:34 -0800 |
commit | dc0e629ea1f074691d307cde3ab7dd51a5e2102f (patch) | |
tree | 9ce01152dc0c5231748a2da03199096a87ec34f5 /src/arch/alpha | |
parent | 22a076a6d5b949db5595bbca530fe7db927f6367 (diff) | |
download | gem5-dc0e629ea1f074691d307cde3ab7dd51a5e2102f.tar.xz |
Implement Ali's review feedback.
Try to decrease indentation, and remove some redundant FullSystem checks.
Diffstat (limited to 'src/arch/alpha')
-rw-r--r-- | src/arch/alpha/faults.cc | 44 | ||||
-rw-r--r-- | src/arch/alpha/remote_gdb.cc | 77 | ||||
-rw-r--r-- | src/arch/alpha/utility.cc | 30 |
3 files changed, 76 insertions, 75 deletions
diff --git a/src/arch/alpha/faults.cc b/src/arch/alpha/faults.cc index a6d3ef2d0..e4a5c9223 100644 --- a/src/arch/alpha/faults.cc +++ b/src/arch/alpha/faults.cc @@ -187,16 +187,17 @@ ItbPageFault::invoke(ThreadContext *tc, StaticInstPtr inst) { if (FullSystem) { ItbFault::invoke(tc); + return; + } + + Process *p = tc->getProcessPtr(); + TlbEntry entry; + bool success = p->pTable->lookup(pc, entry); + if (!success) { + panic("Tried to execute unmapped address %#x.\n", pc); } else { - Process *p = tc->getProcessPtr(); - TlbEntry entry; - bool success = p->pTable->lookup(pc, entry); - if (!success) { - panic("Tried to execute unmapped address %#x.\n", pc); - } else { - VAddr vaddr(pc); - tc->getITBPtr()->insert(vaddr.page(), entry); - } + VAddr vaddr(pc); + tc->getITBPtr()->insert(vaddr.page(), entry); } } @@ -205,19 +206,20 @@ NDtbMissFault::invoke(ThreadContext *tc, StaticInstPtr inst) { if (FullSystem) { DtbFault::invoke(tc, inst); + return; + } + + Process *p = tc->getProcessPtr(); + TlbEntry entry; + bool success = p->pTable->lookup(vaddr, entry); + if (!success) { + if (p->fixupStackFault(vaddr)) + success = p->pTable->lookup(vaddr, entry); + } + if (!success) { + panic("Tried to access unmapped address %#x.\n", (Addr)vaddr); } else { - Process *p = tc->getProcessPtr(); - TlbEntry entry; - bool success = p->pTable->lookup(vaddr, entry); - if (!success) { - if (p->fixupStackFault(vaddr)) - success = p->pTable->lookup(vaddr, entry); - } - if (!success) { - panic("Tried to access unmapped address %#x.\n", (Addr)vaddr); - } else { - tc->getDTBPtr()->insert(vaddr.page(), entry); - } + tc->getDTBPtr()->insert(vaddr.page(), entry); } } diff --git a/src/arch/alpha/remote_gdb.cc b/src/arch/alpha/remote_gdb.cc index aaf9ecb3c..aa120686c 100644 --- a/src/arch/alpha/remote_gdb.cc +++ b/src/arch/alpha/remote_gdb.cc @@ -156,51 +156,50 @@ RemoteGDB::RemoteGDB(System *_system, ThreadContext *tc) bool RemoteGDB::acc(Addr va, size_t len) { - if (FullSystem) { - Addr last_va; - - va = TruncPage(va); - last_va = RoundPage(va + len); - - do { - if (IsK0Seg(va)) { - if (va < (K0SegBase + pmem->size())) { - DPRINTF(GDBAcc, "acc: Mapping is valid K0SEG <= " - "%#x < K0SEG + size\n", va); - return true; - } else { - DPRINTF(GDBAcc, "acc: Mapping invalid %#x " - "> K0SEG + size\n", va); - return false; - } - } + if (!FullSystem) + panic("acc function needs to be rewritten for SE mode\n"); - /** - * This code says that all accesses to palcode (instruction - * and data) are valid since there isn't a va->pa mapping - * because palcode is accessed physically. At some point this - * should probably be cleaned up but there is no easy way to - * do it. - */ + Addr last_va; - if (PcPAL(va) || va < 0x10000) - return true; + va = TruncPage(va); + last_va = RoundPage(va + len); - Addr ptbr = context->readMiscRegNoEffect(IPR_PALtemp20); - PageTableEntry pte = - kernel_pte_lookup(context->getPhysProxy(), ptbr, va); - if (!pte.valid()) { - DPRINTF(GDBAcc, "acc: %#x pte is invalid\n", va); + do { + if (IsK0Seg(va)) { + if (va < (K0SegBase + pmem->size())) { + DPRINTF(GDBAcc, "acc: Mapping is valid K0SEG <= " + "%#x < K0SEG + size\n", va); + return true; + } else { + DPRINTF(GDBAcc, "acc: Mapping invalid %#x " + "> K0SEG + size\n", va); return false; } - va += PageBytes; - } while (va < last_va); + } - DPRINTF(GDBAcc, "acc: %#x mapping is valid\n", va); - return true; - } else { - panic("acc function needs to be rewritten for SE mode\n"); - } + /** + * This code says that all accesses to palcode (instruction + * and data) are valid since there isn't a va->pa mapping + * because palcode is accessed physically. At some point this + * should probably be cleaned up but there is no easy way to + * do it. + */ + + if (PcPAL(va) || va < 0x10000) + return true; + + Addr ptbr = context->readMiscRegNoEffect(IPR_PALtemp20); + PageTableEntry pte = + kernel_pte_lookup(context->getPhysProxy(), ptbr, va); + if (!pte.valid()) { + DPRINTF(GDBAcc, "acc: %#x pte is invalid\n", va); + return false; + } + va += PageBytes; + } while (va < last_va); + + DPRINTF(GDBAcc, "acc: %#x mapping is valid\n", va); + return true; } /* diff --git a/src/arch/alpha/utility.cc b/src/arch/alpha/utility.cc index efafec4bc..1bac650a0 100644 --- a/src/arch/alpha/utility.cc +++ b/src/arch/alpha/utility.cc @@ -39,24 +39,24 @@ namespace AlphaISA { uint64_t getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp) { - if (FullSystem) { - const int NumArgumentRegs = 6; - if (number < NumArgumentRegs) { - if (fp) - return tc->readFloatRegBits(16 + number); - else - return tc->readIntReg(16 + number); - } else { - Addr sp = tc->readIntReg(StackPointerReg); - FSTranslatingPortProxy* vp = tc->getVirtProxy(); - uint64_t arg = vp->read<uint64_t>(sp + - (number-NumArgumentRegs) * sizeof(uint64_t)); - return arg; - } - } else { + if (!FullSystem) { panic("getArgument() is Full system only\n"); M5_DUMMY_RETURN; } + + const int NumArgumentRegs = 6; + if (number < NumArgumentRegs) { + if (fp) + return tc->readFloatRegBits(16 + number); + else + return tc->readIntReg(16 + number); + } else { + Addr sp = tc->readIntReg(StackPointerReg); + FSTranslatingPortProxy* vp = tc->getVirtProxy(); + uint64_t arg = vp->read<uint64_t>(sp + + (number-NumArgumentRegs) * sizeof(uint64_t)); + return arg; + } } void |