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author | Gabe Black <gblack@eecs.umich.edu> | 2009-07-08 23:02:22 -0700 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2009-07-08 23:02:22 -0700 |
commit | c9a27d85b9066489bf227f19d61ce5ddd1bc91c3 (patch) | |
tree | 9160f51be38043ae765f4b74c9baa82a7d107d39 /src/arch/alpha | |
parent | 3d39b6213265ceeb14b8089190e5a097f17fdc1b (diff) | |
download | gem5-c9a27d85b9066489bf227f19d61ce5ddd1bc91c3.tar.xz |
Get rid of the unused get(Data|Inst)Asid and (inst|data)Asid functions.
Diffstat (limited to 'src/arch/alpha')
-rw-r--r-- | src/arch/alpha/ev5.cc | 12 | ||||
-rw-r--r-- | src/arch/alpha/isa.hh | 5 |
2 files changed, 0 insertions, 17 deletions
diff --git a/src/arch/alpha/ev5.cc b/src/arch/alpha/ev5.cc index 3bc0492b1..bf641d2fe 100644 --- a/src/arch/alpha/ev5.cc +++ b/src/arch/alpha/ev5.cc @@ -127,18 +127,6 @@ zeroRegisters(CPU *cpu) cpu->thread->setFloatReg(ZeroReg, 0.0); } -int -ISA::getInstAsid() -{ - return ITB_ASN_ASN(ipr[IPR_ITB_ASN]); -} - -int -ISA::getDataAsid() -{ - return DTB_ASN_ASN(ipr[IPR_DTB_ASN]); -} - #endif //////////////////////////////////////////////////////////////////////// diff --git a/src/arch/alpha/isa.hh b/src/arch/alpha/isa.hh index dbd1c43a9..622d1da4c 100644 --- a/src/arch/alpha/isa.hh +++ b/src/arch/alpha/isa.hh @@ -65,11 +65,6 @@ namespace AlphaISA public: - // These functions should be removed once the simplescalar cpu - // model has been replaced. - int getInstAsid(); - int getDataAsid(); - MiscReg readMiscRegNoEffect(int misc_reg, ThreadID tid = 0); MiscReg readMiscReg(int misc_reg, ThreadContext *tc, ThreadID tid = 0); |