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| author | Andreas Hansson <andreas.hansson@arm.com> | 2016-01-11 05:52:20 -0500 |
|---|---|---|
| committer | Andreas Hansson <andreas.hansson@arm.com> | 2016-01-11 05:52:20 -0500 |
| commit | 12eb0343784f52994110df7e7fce4a0b639a6ec3 (patch) | |
| tree | 12ff1c51b8051bb7e7d889eed499bee0dcd4cd1e /src/arch/alpha | |
| parent | 7661f1c2bf2b45603264076fabce2eb42373cd18 (diff) | |
| download | gem5-12eb0343784f52994110df7e7fce4a0b639a6ec3.tar.xz | |
scons: Enable -Wextra by default
Make best use of the compiler, and enable -Wextra as well as
-Wall. There are a few issues that had to be resolved, but they are
all trivial.
Diffstat (limited to 'src/arch/alpha')
| -rw-r--r-- | src/arch/alpha/faults.hh | 2 | ||||
| -rw-r--r-- | src/arch/alpha/utility.hh | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/alpha/faults.hh b/src/arch/alpha/faults.hh index 005d8af8a..80e3ae5e1 100644 --- a/src/arch/alpha/faults.hh +++ b/src/arch/alpha/faults.hh @@ -40,7 +40,7 @@ namespace AlphaISA { -typedef const Addr FaultVect; +typedef Addr FaultVect; class AlphaFault : public FaultBase { diff --git a/src/arch/alpha/utility.hh b/src/arch/alpha/utility.hh index a52125066..45e47b5e8 100644 --- a/src/arch/alpha/utility.hh +++ b/src/arch/alpha/utility.hh @@ -78,7 +78,7 @@ inline void startupCPU(ThreadContext *tc, int cpuId) inline Addr PteAddr(Addr a) { return (a & PteMask) << PteShift; } // User Virtual -inline bool IsUSeg(Addr a) { return USegBase <= a && a <= USegEnd; } +inline bool IsUSeg(Addr a) { assert(USegBase == 0); return a <= USegEnd; } // Kernel Direct Mapped inline bool IsK0Seg(Addr a) { return K0SegBase <= a && a <= K0SegEnd; } |