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authorGabe Black <gblack@eecs.umich.edu>2012-05-26 13:45:12 -0700
committerGabe Black <gblack@eecs.umich.edu>2012-05-26 13:45:12 -0700
commit19df4e94ee4f2323e5fe1b915f7e81a6034cfc56 (patch)
treeae0fbc2a53a90e022e91b00f028451759c2d270d /src/arch/alpha
parent0cba96ba6a5d7a4dab2a63b14149c49dfbfbb3bc (diff)
downloadgem5-19df4e94ee4f2323e5fe1b915f7e81a6034cfc56.tar.xz
ISA,CPU: Generalize and split out the components of the decode cache.
This will allow it to be specialized by the ISAs. The existing caching scheme is provided by the BasicDecodeCache in the GenericISA namespace and is built from the generalized components. --HG-- rename : src/cpu/decode_cache.cc => src/arch/generic/decode_cache.cc
Diffstat (limited to 'src/arch/alpha')
-rw-r--r--src/arch/alpha/decoder.cc2
-rw-r--r--src/arch/alpha/decoder.hh8
2 files changed, 6 insertions, 4 deletions
diff --git a/src/arch/alpha/decoder.cc b/src/arch/alpha/decoder.cc
index 8cabe515d..e5a7663ff 100644
--- a/src/arch/alpha/decoder.cc
+++ b/src/arch/alpha/decoder.cc
@@ -33,6 +33,6 @@
namespace AlphaISA
{
-DecodeCache Decoder::defaultCache;
+GenericISA::BasicDecodeCache Decoder::defaultCache;
}
diff --git a/src/arch/alpha/decoder.hh b/src/arch/alpha/decoder.hh
index 4233c2d44..ef2f5856c 100644
--- a/src/arch/alpha/decoder.hh
+++ b/src/arch/alpha/decoder.hh
@@ -31,11 +31,13 @@
#ifndef __ARCH_ALPHA_DECODER_HH__
#define __ARCH_ALPHA_DECODER_HH__
+#include "arch/generic/decode_cache.hh"
#include "arch/types.hh"
-#include "cpu/decode_cache.hh"
-#include "cpu/static_inst_fwd.hh"
+#include "cpu/static_inst.hh"
#include "sim/full_system.hh"
+class ThreadContext;
+
namespace AlphaISA
{
@@ -99,7 +101,7 @@ class Decoder
protected:
/// A cache of decoded instruction objects.
- static DecodeCache defaultCache;
+ static GenericISA::BasicDecodeCache defaultCache;
public:
StaticInstPtr decodeInst(ExtMachInst mach_inst);