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| author | Gabe Black <gblack@eecs.umich.edu> | 2011-10-31 01:09:44 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2011-10-31 01:09:44 -0700 |
| commit | d735abe5dabf483aafb0ccfb0a70cb7c3b0a5a74 (patch) | |
| tree | dd273d4e65d4ba5a11a5928f3aa4d012fbcd2e19 /src/arch/alpha | |
| parent | ce2f9625f4c4ed0bf6a79eede184a222e61b1f26 (diff) | |
| download | gem5-d735abe5dabf483aafb0ccfb0a70cb7c3b0a5a74.tar.xz | |
GCC: Get everything working with gcc 4.6.1.
And by "everything" I mean all the quick regressions.
Diffstat (limited to 'src/arch/alpha')
| -rw-r--r-- | src/arch/alpha/ev5.cc | 7 | ||||
| -rw-r--r-- | src/arch/alpha/isa/mem.isa | 2 |
2 files changed, 3 insertions, 6 deletions
diff --git a/src/arch/alpha/ev5.cc b/src/arch/alpha/ev5.cc index 2bc913f92..6259f8fc2 100644 --- a/src/arch/alpha/ev5.cc +++ b/src/arch/alpha/ev5.cc @@ -209,8 +209,6 @@ int break_ipl = -1; void ISA::setIpr(int idx, uint64_t val, ThreadContext *tc) { - uint64_t old; - if (tc->misspeculating()) return; @@ -262,12 +260,11 @@ ISA::setIpr(int idx, uint64_t val, ThreadContext *tc) case IPR_PALtemp23: // write entire quad w/ no side-effect - old = ipr[idx]; - ipr[idx] = val; #if FULL_SYSTEM if (tc->getKernelStats()) - tc->getKernelStats()->context(old, val, tc); + tc->getKernelStats()->context(ipr[idx], val, tc); #endif + ipr[idx] = val; break; case IPR_DTB_PTE: diff --git a/src/arch/alpha/isa/mem.isa b/src/arch/alpha/isa/mem.isa index ed5128204..f286be91c 100644 --- a/src/arch/alpha/isa/mem.isa +++ b/src/arch/alpha/isa/mem.isa @@ -388,7 +388,7 @@ def template MiscExecute {{ Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const { - Addr EA; + Addr EA M5_VAR_USED; Fault fault = NoFault; %(fp_enable_check)s; |