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| author | Andreas Hansson <andreas.hansson@arm.com> | 2015-02-16 03:33:28 -0500 |
|---|---|---|
| committer | Andreas Hansson <andreas.hansson@arm.com> | 2015-02-16 03:33:28 -0500 |
| commit | d0e1b8a19c6d58a49e5288938e9b12f3f10b9f51 (patch) | |
| tree | f990864e7fb9ffaf11e3895e8337737941390aa2 /src/arch/alpha | |
| parent | 07ce60bdfa57eedf00f533704b5a2da3fa01b553 (diff) | |
| download | gem5-d0e1b8a19c6d58a49e5288938e9b12f3f10b9f51.tar.xz | |
arch: Make readMiscRegNoEffect const throughout
Finally took the plunge and made this apply to all ISAs, not just ARM.
Diffstat (limited to 'src/arch/alpha')
| -rw-r--r-- | src/arch/alpha/isa.cc | 2 | ||||
| -rw-r--r-- | src/arch/alpha/isa.hh | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/alpha/isa.cc b/src/arch/alpha/isa.cc index 95dfdedd6..20f039166 100644 --- a/src/arch/alpha/isa.cc +++ b/src/arch/alpha/isa.cc @@ -74,7 +74,7 @@ ISA::unserialize(Checkpoint *cp, const std::string §ion) MiscReg -ISA::readMiscRegNoEffect(int misc_reg, ThreadID tid) +ISA::readMiscRegNoEffect(int misc_reg, ThreadID tid) const { switch (misc_reg) { case MISCREG_FPCR: diff --git a/src/arch/alpha/isa.hh b/src/arch/alpha/isa.hh index 36515b520..52e4e98be 100644 --- a/src/arch/alpha/isa.hh +++ b/src/arch/alpha/isa.hh @@ -73,7 +73,7 @@ namespace AlphaISA public: - MiscReg readMiscRegNoEffect(int misc_reg, ThreadID tid = 0); + MiscReg readMiscRegNoEffect(int misc_reg, ThreadID tid = 0) const; MiscReg readMiscReg(int misc_reg, ThreadContext *tc, ThreadID tid = 0); void setMiscRegNoEffect(int misc_reg, const MiscReg &val, |