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| author | Curtis Dunham <Curtis.Dunham@arm.com> | 2016-08-02 10:38:01 +0100 |
|---|---|---|
| committer | Curtis Dunham <Curtis.Dunham@arm.com> | 2016-08-02 10:38:01 +0100 |
| commit | 49538a71186d98f5440c5db646e23507fc2e38d1 (patch) | |
| tree | 96994897ff3faf3da05b44d2375afcc0b98140b9 /src/arch/arm/ArmISA.py | |
| parent | 4fbf40daab480ae02b75a75e0dd5f56ce38386d2 (diff) | |
| download | gem5-49538a71186d98f5440c5db646e23507fc2e38d1.tar.xz | |
arm: enable EL2 support
Change-Id: I59fa4fae98c33d9e5c2185382e1411911d27d341
Diffstat (limited to 'src/arch/arm/ArmISA.py')
| -rw-r--r-- | src/arch/arm/ArmISA.py | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/src/arch/arm/ArmISA.py b/src/arch/arm/ArmISA.py index 7ef8afd88..146ca6494 100644 --- a/src/arch/arm/ArmISA.py +++ b/src/arch/arm/ArmISA.py @@ -1,4 +1,4 @@ -# Copyright (c) 2012-2013, 2015 ARM Limited +# Copyright (c) 2012-2013, 2015-2016 ARM Limited # All rights reserved. # # The license below extends only to copyright in the software and shall @@ -117,8 +117,7 @@ class ArmISA(SimObject): "AArch64 Memory Model Feature Register 1") # !GICv3 CP15 | AdvSIMD | FP | !EL3 | !EL2 | EL1 (AArch64) | EL0 (AArch64) - # (no AArch32/64 interprocessing support for now) - id_aa64pfr0_el1 = Param.UInt64(0x0000000000000011, + id_aa64pfr0_el1 = Param.UInt64(0x0000000000000022, "AArch64 Processor Feature Register 0") # Reserved for future expansion id_aa64pfr1_el1 = Param.UInt64(0x0000000000000000, |