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| author | Curtis Dunham <Curtis.Dunham@arm.com> | 2016-12-19 11:03:28 -0600 |
|---|---|---|
| committer | Curtis Dunham <Curtis.Dunham@arm.com> | 2016-12-19 11:03:28 -0600 |
| commit | ae2e0ca3d08283ed3987e4217df843d5982847c5 (patch) | |
| tree | 55022a80c43694d64eb2722eb2f31bf0f7f4b634 /src/arch/arm/ArmISA.py | |
| parent | a73937b60c0057d006938bca7ec69a8b48450f2c (diff) | |
| download | gem5-ae2e0ca3d08283ed3987e4217df843d5982847c5.tar.xz | |
arm: compute ID_AA64PFR{0,1}_EL1 registers
Compute the proper values of the aforementioned registers from
the system configuration rather than configuring the values themselves.
Change-Id: If9774b6610a29568b80ae4866107b9a6a5b5be0f
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Diffstat (limited to 'src/arch/arm/ArmISA.py')
| -rw-r--r-- | src/arch/arm/ArmISA.py | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/src/arch/arm/ArmISA.py b/src/arch/arm/ArmISA.py index fbefe3daf..73ef4a09d 100644 --- a/src/arch/arm/ArmISA.py +++ b/src/arch/arm/ArmISA.py @@ -106,10 +106,3 @@ class ArmISA(SimObject): # Reserved for future expansion id_aa64mmfr1_el1 = Param.UInt64(0x0000000000000000, "AArch64 Memory Model Feature Register 1") - - # !GICv3 CP15 | AdvSIMD | FP | !EL3 | !EL2 | EL1 (AArch64) | EL0 (AArch64) - id_aa64pfr0_el1 = Param.UInt64(0x0000000000000022, - "AArch64 Processor Feature Register 0") - # Reserved for future expansion - id_aa64pfr1_el1 = Param.UInt64(0x0000000000000000, - "AArch64 Processor Feature Register 1") |