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authorGabe Black <gblack@eecs.umich.edu>2010-06-02 12:58:09 -0500
committerGabe Black <gblack@eecs.umich.edu>2010-06-02 12:58:09 -0500
commite658b6fed46afb0b587dba037bd4558e82c05b0d (patch)
tree7d5096febe4f2b3af4d0d24e9d1a12bb904d9e2a /src/arch/arm/ArmInterrupts.py
parent896c7617c47cd83b0e119b62baa133307d05cecd (diff)
downloadgem5-e658b6fed46afb0b587dba037bd4558e82c05b0d.tar.xz
ARM: Add support for the clidr register.
This register will always report 0 caches as implemented. It's not clear how to find out how many there really are when dealing with an arbitrary hierarchy.
Diffstat (limited to 'src/arch/arm/ArmInterrupts.py')
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