summaryrefslogtreecommitdiff
path: root/src/arch/arm/ArmNativeTrace.py
diff options
context:
space:
mode:
authorAli Saidi <Ali.Saidi@ARM.com>2015-01-25 07:22:17 -0500
committerAli Saidi <Ali.Saidi@ARM.com>2015-01-25 07:22:17 -0500
commit0bd986015b2de741dc741f10e5afeaf5d8890ba1 (patch)
treeb264b3fd434124d7b04eb4a6b337cb38e8ccb305 /src/arch/arm/ArmNativeTrace.py
parent6c4a23c1c637d77f60df9516d0f36c71d12a2298 (diff)
downloadgem5-0bd986015b2de741dc741f10e5afeaf5d8890ba1.tar.xz
cpu: Put all CPU instruction tracers in a single file
Diffstat (limited to 'src/arch/arm/ArmNativeTrace.py')
-rw-r--r--src/arch/arm/ArmNativeTrace.py2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/arm/ArmNativeTrace.py b/src/arch/arm/ArmNativeTrace.py
index 91da1ed76..3101c33de 100644
--- a/src/arch/arm/ArmNativeTrace.py
+++ b/src/arch/arm/ArmNativeTrace.py
@@ -28,7 +28,7 @@
from m5.SimObject import SimObject
from m5.params import *
-from NativeTrace import NativeTrace
+from CPUTracers import NativeTrace
class ArmNativeTrace(NativeTrace):
type = 'ArmNativeTrace'