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| author | Andreas Hansson <andreas.hansson@arm.com> | 2015-05-05 03:22:30 -0400 |
|---|---|---|
| committer | Andreas Hansson <andreas.hansson@arm.com> | 2015-05-05 03:22:30 -0400 |
| commit | 23b9792681d4cd794b0ad74138160a37b8bdac8f (patch) | |
| tree | dd849032f615ec6a5ff43a6a2e93393d8f6fd5f7 /src/arch/arm/ArmSystem.py | |
| parent | 36f29496a019af4483430f17c4a6028b8dcfb2cf (diff) | |
| download | gem5-23b9792681d4cd794b0ad74138160a37b8bdac8f.tar.xz | |
arm: Remove unnecessary boot uncachability
With the recent patches addressing how we deal with uncacheable
accesses there is no longer need for the work arounds put in place to
enforce certain sections of memory to be uncacheable during boot.
Diffstat (limited to 'src/arch/arm/ArmSystem.py')
| -rw-r--r-- | src/arch/arm/ArmSystem.py | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/arch/arm/ArmSystem.py b/src/arch/arm/ArmSystem.py index f40458ca5..f3c2c8891 100644 --- a/src/arch/arm/ArmSystem.py +++ b/src/arch/arm/ArmSystem.py @@ -79,8 +79,6 @@ class GenericArmSystem(ArmSystem): "Machine id from http://www.arm.linux.org.uk/developer/machines/") atags_addr = Param.Addr("Address where default atags structure should " \ "be written") - boot_release_addr = Param.Addr(0xfff8, "Address where secondary CPUs " \ - "spin waiting boot in the loader") dtb_filename = Param.String("", "File that contains the Device Tree Blob. Don't use DTB if empty.") early_kernel_symbols = Param.Bool(False, |