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authorChander Sudanthi <chander.sudanthi@arm.com>2012-06-05 01:23:10 -0400
committerChander Sudanthi <chander.sudanthi@arm.com>2012-06-05 01:23:10 -0400
commit8a2ca2fd241a1019122578a875c917329710c930 (patch)
tree2c4f71668dc949bd0e2fb52dc023922bde43a3ac /src/arch/arm/ArmSystem.py
parente60b2ac7060eff8dd6d68c7f92ef220511e7daa2 (diff)
downloadgem5-8a2ca2fd241a1019122578a875c917329710c930.tar.xz
ARM: Fix MPIDR and MIDR register implementation.
This change allows designating a system as MP capable or not as some bootloaders/kernels care that it's set right. You can have a single processor MP capable system, but you can't have a multi-processor UP only system. This change also fixes the initialization of the MIDR register.
Diffstat (limited to 'src/arch/arm/ArmSystem.py')
-rw-r--r--src/arch/arm/ArmSystem.py1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/arch/arm/ArmSystem.py b/src/arch/arm/ArmSystem.py
index a86fc8822..54bf99e90 100644
--- a/src/arch/arm/ArmSystem.py
+++ b/src/arch/arm/ArmSystem.py
@@ -55,6 +55,7 @@ class ArmSystem(System):
# 0xc00 Primary part number ("c" or higher implies ARM v7)
# 0x0 Revision
midr_regval = Param.UInt32(0x350fc000, "MIDR value")
+ multi_proc = Param.Bool(True, "Multiprocessor system?")
boot_loader = Param.String("", "File that contains the boot loader code if any")
gic_cpu_addr = Param.Addr(0, "Addres of the GIC CPU interface")
flags_addr = Param.Addr(0, "Address of the flags register for MP booting")