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| author | Nathan Binkert <nate@binkert.org> | 2009-04-21 16:04:55 -0700 |
|---|---|---|
| committer | Nathan Binkert <nate@binkert.org> | 2009-04-21 16:04:55 -0700 |
| commit | 4d001e43da6da2972172c352153e745238860021 (patch) | |
| tree | dfd0052a6ece6690540df06b4742e6d4d4cc2034 /src/arch/arm/ArmTLB.py | |
| parent | 4f7d6a881ce959663cb32f9bb70b4a6b40a456e1 (diff) | |
| parent | fcc142463d38fc1d752b2e45c24a9e1040ccfc9e (diff) | |
| download | gem5-4d001e43da6da2972172c352153e745238860021.tar.xz | |
Automated merge with ssh://m5sim.org//repo/m5
Diffstat (limited to 'src/arch/arm/ArmTLB.py')
| -rw-r--r-- | src/arch/arm/ArmTLB.py | 19 |
1 files changed, 1 insertions, 18 deletions
diff --git a/src/arch/arm/ArmTLB.py b/src/arch/arm/ArmTLB.py index fa9faaddf..3dd2560fe 100644 --- a/src/arch/arm/ArmTLB.py +++ b/src/arch/arm/ArmTLB.py @@ -32,23 +32,6 @@ from m5.SimObject import SimObject from m5.params import * class ArmTLB(SimObject): - abstract = True type = 'ArmTLB' cxx_class = 'ArmISA::TLB' - size = Param.Int("TLB size") - -class ArmDTB(ArmTLB): - type = 'ArmDTB' - cxx_class = 'ArmISA::DTB' - size = 64 - -class ArmITB(ArmTLB): - type = 'ArmITB' - cxx_class = 'ArmISA::ITB' - size = 64 - -class ArmUTB(ArmTLB): - type = 'ArmUTB' - cxx_class = 'ArmISA::UTB' - size = 64 - + size = Param.Int(64, "TLB size") |