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authorAli Saidi <Ali.Saidi@ARM.com>2010-06-02 12:58:16 -0500
committerAli Saidi <Ali.Saidi@ARM.com>2010-06-02 12:58:16 -0500
commitcb9936cfdefdebf2c0b950f93a62d504d356524d (patch)
tree3280784b875ccd23475c3f08edc774b50ef1c97d /src/arch/arm/ArmTLB.py
parentf246be4cbc27b4173f6917b430a31b9a39cdb380 (diff)
downloadgem5-cb9936cfdefdebf2c0b950f93a62d504d356524d.tar.xz
ARM: Implement the ARM TLB/Tablewalker. Needs performance improvements.
Diffstat (limited to 'src/arch/arm/ArmTLB.py')
-rw-r--r--src/arch/arm/ArmTLB.py29
1 files changed, 27 insertions, 2 deletions
diff --git a/src/arch/arm/ArmTLB.py b/src/arch/arm/ArmTLB.py
index 3dd2560fe..f0d23445f 100644
--- a/src/arch/arm/ArmTLB.py
+++ b/src/arch/arm/ArmTLB.py
@@ -1,8 +1,17 @@
# -*- mode:python -*-
-# Copyright (c) 2007-2008 The Florida State University
+# Copyright (c) 2009 ARM Limited
# All rights reserved.
#
+# The license below extends only to copyright in the software and shall
+# not be construed as granting a license to any other intellectual
+# property including but not limited to intellectual property relating
+# to a hardware implementation of the functionality of the software
+# licensed hereunder. You may use the software subject to the license
+# terms below provided that you ensure that this notice is replicated
+# unmodified and in its entirety in all distributions of the software,
+# modified or unmodified, in source code or in binary form.
+#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are
# met: redistributions of source code must retain the above copyright
@@ -26,12 +35,28 @@
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
-# Authors: Stephen Hines
+# Authors: Ali Saidi
+from m5.defines import buildEnv
from m5.SimObject import SimObject
from m5.params import *
+from m5.proxy import *
+
+if buildEnv['FULL_SYSTEM']:
+ from MemObject import MemObject
+
+ class ArmTableWalker(MemObject):
+ type = 'ArmTableWalker'
+ cxx_class = 'ArmISA::TableWalker'
+ port = Port("Port for TableWalker to do walk the translation with")
+ sys = Param.System(Parent.any, "system object parameter")
+ min_backoff = Param.Tick(0, "Minimum backoff delay after failed send")
+ max_backoff = Param.Tick(100000, "Minimum backoff delay after failed send")
+
class ArmTLB(SimObject):
type = 'ArmTLB'
cxx_class = 'ArmISA::TLB'
size = Param.Int(64, "TLB size")
+ if buildEnv['FULL_SYSTEM']:
+ walker = Param.ArmTableWalker(ArmTableWalker(), "HW Table walker")