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| author | Gabe Black <gblack@eecs.umich.edu> | 2009-07-27 00:51:35 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2009-07-27 00:51:35 -0700 |
| commit | 519ace4dfdb5150915336735a34e21fb6c70b1dd (patch) | |
| tree | d664e22d144ddc52d833328f733cb3ff2cf137b4 /src/arch/arm/SConscript | |
| parent | a343e33699bafa3a3264ceeda4347c9f15daaca7 (diff) | |
| download | gem5-519ace4dfdb5150915336735a34e21fb6c70b1dd.tar.xz | |
ARM: Add a native tracer.
--HG--
rename : src/arch/sparc/SparcNativeTrace.py => src/arch/arm/ArmNativeTrace.py
rename : src/arch/sparc/nativetrace.cc => src/arch/arm/nativetrace.cc
rename : src/arch/sparc/nativetrace.hh => src/arch/arm/nativetrace.hh
Diffstat (limited to 'src/arch/arm/SConscript')
| -rw-r--r-- | src/arch/arm/SConscript | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/arch/arm/SConscript b/src/arch/arm/SConscript index 519435489..55ecabdc3 100644 --- a/src/arch/arm/SConscript +++ b/src/arch/arm/SConscript @@ -39,11 +39,14 @@ if env['TARGET_ISA'] == 'arm': Source('insts/mem.cc') Source('insts/pred_inst.cc') Source('insts/static_inst.cc') + Source('nativetrace.cc') Source('pagetable.cc') Source('tlb.cc') Source('vtophys.cc') + SimObject('ArmNativeTrace.py') SimObject('ArmTLB.py') + TraceFlag('Arm') if env['FULL_SYSTEM']: |