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| author | Gabe Black <gblack@eecs.umich.edu> | 2009-11-10 20:34:38 -0800 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2009-11-10 20:34:38 -0800 |
| commit | 2e28da5583814efe1e0a09718f6a674f983d12d1 (patch) | |
| tree | 28f95117047652c1dceec3eef6f239f6d278ece4 /src/arch/arm/SConscript | |
| parent | 4779020e139c70355335729b504195a0e5009e7a (diff) | |
| download | gem5-2e28da5583814efe1e0a09718f6a674f983d12d1.tar.xz | |
ARM: Implement fault classes.
Implement some fault classes using the curriously recurring template pattern,
similar to SPARCs.
Diffstat (limited to 'src/arch/arm/SConscript')
| -rw-r--r-- | src/arch/arm/SConscript | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/arm/SConscript b/src/arch/arm/SConscript index 55ecabdc3..f5fe1727c 100644 --- a/src/arch/arm/SConscript +++ b/src/arch/arm/SConscript @@ -48,7 +48,7 @@ if env['TARGET_ISA'] == 'arm': SimObject('ArmTLB.py') TraceFlag('Arm') - + TraceFlag('Faults', "Trace Exceptions, interrupts, svc/swi") if env['FULL_SYSTEM']: #Insert Full-System Files Here pass |