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| author | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:08 -0500 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:08 -0500 |
| commit | 6aa229386dcd8b6d15529a0acdf8e3040dfeb337 (patch) | |
| tree | a8ec8aa6fc3aae1f9fdb9a0aecae6d6b53569eed /src/arch/arm/SConscript | |
| parent | 7ff24c877750a24507afb87eebe14cd1df40a5fa (diff) | |
| download | gem5-6aa229386dcd8b6d15529a0acdf8e3040dfeb337.tar.xz | |
ARM: Implement a function to decode CP15 registers to MiscReg indices.
Diffstat (limited to 'src/arch/arm/SConscript')
| -rw-r--r-- | src/arch/arm/SConscript | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/arch/arm/SConscript b/src/arch/arm/SConscript index 7580aa272..a4aa1c020 100644 --- a/src/arch/arm/SConscript +++ b/src/arch/arm/SConscript @@ -54,6 +54,7 @@ if env['TARGET_ISA'] == 'arm': Source('insts/misc.cc') Source('insts/pred_inst.cc') Source('insts/static_inst.cc') + Source('miscregs.cc') Source('nativetrace.cc') Source('pagetable.cc') Source('tlb.cc') |