summaryrefslogtreecommitdiff
path: root/src/arch/arm/fastmodel/iris/cpu.cc
diff options
context:
space:
mode:
authorGabe Black <gabeblack@google.com>2019-08-28 02:53:31 -0700
committerGabe Black <gabeblack@google.com>2019-10-01 22:09:06 +0000
commit6c9f86e7e3dc1983e556d4f0db135118a91afa34 (patch)
tree9a063fe93c7f235a655e92db49ba06469acecc04 /src/arch/arm/fastmodel/iris/cpu.cc
parent0c6afe0d0ab22221911619cd5eef3589e0e04e08 (diff)
downloadgem5-6c9f86e7e3dc1983e556d4f0db135118a91afa34.tar.xz
fastmodel: Add a gem5Cpu attribute to the CortexA76x1.
This attribute is to let the fast model EVS CPU find and talk to the gem5 CPU in case it needs a pointer to one of its ThreadContexts for instance. Also move the code that finds the clock period attribute/event to the constructor. gem5 guarantees that the EVS is constructed before its pointer is passed to the iris CPU wrapper, and so the EVS will have had a chance to install those controls if it's going to. Change-Id: I389ef0ba0f9d528140f40444baa5091a9ec338cd Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21045 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com> Tested-by: kokoro <noreply+kokoro@google.com>
Diffstat (limited to 'src/arch/arm/fastmodel/iris/cpu.cc')
-rw-r--r--src/arch/arm/fastmodel/iris/cpu.cc29
1 files changed, 29 insertions, 0 deletions
diff --git a/src/arch/arm/fastmodel/iris/cpu.cc b/src/arch/arm/fastmodel/iris/cpu.cc
index 67de40e6f..234a1ca0d 100644
--- a/src/arch/arm/fastmodel/iris/cpu.cc
+++ b/src/arch/arm/fastmodel/iris/cpu.cc
@@ -34,6 +34,35 @@
namespace Iris
{
+BaseCPU::BaseCPU(BaseCPUParams *params, sc_core::sc_module *_evs) :
+ ::BaseCPU::BaseCPU(params), evs(_evs),
+ clockEvent(nullptr), periodAttribute(nullptr)
+{
+ sc_core::sc_attr_base *base;
+
+ base = evs->get_attribute(Gem5CpuAttributeName);
+ auto *gem5_cpu_attr =
+ dynamic_cast<sc_core::sc_attribute<::BaseCPU *> *>(base);
+ panic_if(base && !gem5_cpu_attr,
+ "The EVS gem5 CPU attribute was not of type "
+ "sc_attribute<::BaesCPU *>.");
+ if (gem5_cpu_attr)
+ gem5_cpu_attr->value = this;
+
+ const auto &event_vec = evs->get_child_events();
+ auto event_it = std::find_if(event_vec.begin(), event_vec.end(),
+ [](const sc_core::sc_event *e) -> bool {
+ return e->basename() == ClockEventName; });
+ if (event_it != event_vec.end())
+ clockEvent = *event_it;
+
+ base = evs->get_attribute(PeriodAttributeName);
+ periodAttribute = dynamic_cast<sc_core::sc_attribute<Tick> *>(base);
+ panic_if(base && !periodAttribute,
+ "The EVS clock period attribute is not of type "
+ "sc_attribute<Tick>.");
+}
+
BaseCPU::~BaseCPU()
{
for (auto &tc: threadContexts)