diff options
| author | Gabe Black <gabeblack@google.com> | 2019-08-27 17:20:30 -0700 |
|---|---|---|
| committer | Gabe Black <gabeblack@google.com> | 2019-10-01 22:08:49 +0000 |
| commit | 54cf33fbf392f4dc47c8c3559e6f6f10ae3288dc (patch) | |
| tree | 4bf35806fc82cb7ec202d432fe3e08124189c7b1 /src/arch/arm/fastmodel/protocol/SConscript | |
| parent | 791d7f4f416ac7469626fcf10fab1b1aa9183cf9 (diff) | |
| download | gem5-54cf33fbf392f4dc47c8c3559e6f6f10ae3288dc.tar.xz | |
fastmodel: Pull out and simplify the interrupt mechanism in the GIC.
This change pulls out the SPI and PPI command structures and replaces
them with a custom protocol which can deliver a SPI or PPI without
having to bundle their parameters into a structure.
Change-Id: I8f15c8b3182bd6560bf5ef0345b0bc64173def85
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21042
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Diffstat (limited to 'src/arch/arm/fastmodel/protocol/SConscript')
| -rw-r--r-- | src/arch/arm/fastmodel/protocol/SConscript | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/arch/arm/fastmodel/protocol/SConscript b/src/arch/arm/fastmodel/protocol/SConscript index b0171f136..f82e04c2a 100644 --- a/src/arch/arm/fastmodel/protocol/SConscript +++ b/src/arch/arm/fastmodel/protocol/SConscript @@ -27,3 +27,5 @@ Depends('ExportedClockRateControlProtocol.lisa', 'exported_clock_rate_control.hh') +Depends('SignalInterruptProtocol.lisa', + 'signal_interrupt.hh') |