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| author | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:10 -0500 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:10 -0500 |
| commit | 524a8195e18f17ee6e57bfbcb2752ac6bfa2d8ee (patch) | |
| tree | 7fac83276dbaad074cedb60c7175d3bd96e60a03 /src/arch/arm/faults.cc | |
| parent | 683421e0c6435e90a25c98431e31438d774442d5 (diff) | |
| download | gem5-524a8195e18f17ee6e57bfbcb2752ac6bfa2d8ee.tar.xz | |
ARM: Set CPSR.E to SCTLR.EE on faults.
Diffstat (limited to 'src/arch/arm/faults.cc')
| -rw-r--r-- | src/arch/arm/faults.cc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/arch/arm/faults.cc b/src/arch/arm/faults.cc index 8428931a7..528fc32a5 100644 --- a/src/arch/arm/faults.cc +++ b/src/arch/arm/faults.cc @@ -111,6 +111,7 @@ ArmFaultBase::invoke(ThreadContext *tc) cpsr.a = cpsr.a | abortDisable(); cpsr.f = cpsr.f | fiqDisable(); cpsr.i = 1; + cpsr.e = sctlr.ee; tc->setMiscReg(MISCREG_CPSR, cpsr); tc->setIntReg(INTREG_LR, tc->readPC() + (saved_cpsr.t ? thumbPcOffset() : armPcOffset())); |