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author | Ali Saidi <Ali.Saidi@ARM.com> | 2011-04-04 11:42:27 -0500 |
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committer | Ali Saidi <Ali.Saidi@ARM.com> | 2011-04-04 11:42:27 -0500 |
commit | 55920a5ca73ded58762f1b7ae25c8cfe8c9e407d (patch) | |
tree | b0bd2754e8b06b0080d0b9d22dbf4c721b209622 /src/arch/arm/faults.cc | |
parent | 5962fecc1d2eaf956f0aab10eee1e0666a461706 (diff) | |
download | gem5-55920a5ca73ded58762f1b7ae25c8cfe8c9e407d.tar.xz |
ARM: Fix table walk going on while ASID changes error
Diffstat (limited to 'src/arch/arm/faults.cc')
-rw-r--r-- | src/arch/arm/faults.cc | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/src/arch/arm/faults.cc b/src/arch/arm/faults.cc index 9ce2e2da4..9fdd58da0 100644 --- a/src/arch/arm/faults.cc +++ b/src/arch/arm/faults.cc @@ -74,6 +74,9 @@ template<> ArmFault::FaultVals ArmFaultVals<FastInterrupt>::vals = template<> ArmFault::FaultVals ArmFaultVals<FlushPipe>::vals = {"Pipe Flush", 0x00, MODE_SVC, 0, 0, true, true}; // some dummy values +template<> ArmFault::FaultVals ArmFaultVals<ReExec>::vals = + {"ReExec Flush", 0x00, MODE_SVC, 0, 0, true, true}; // some dummy values + Addr ArmFault::getVector(ThreadContext *tc) { @@ -225,6 +228,17 @@ FlushPipe::invoke(ThreadContext *tc, StaticInstPtr inst) { tc->pcState(pc); } +void +ReExec::invoke(ThreadContext *tc, StaticInstPtr inst) { + DPRINTF(Faults, "Invoking ReExec Fault\n"); + + // Set the PC to then the faulting instruction. + // Net effect is simply squashing all instructions including this + // instruction and refetching/rexecuting current instruction + PCState pc = tc->pcState(); + tc->pcState(pc); +} + template void AbortFault<PrefetchAbort>::invoke(ThreadContext *tc, StaticInstPtr inst); template void AbortFault<DataAbort>::invoke(ThreadContext *tc, |