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authorDylan Johnson <Dylan.Johnson@ARM.com>2016-08-02 10:38:03 +0100
committerDylan Johnson <Dylan.Johnson@ARM.com>2016-08-02 10:38:03 +0100
commitbce923c1891d85b9503523cb66fcf1511f30cd9d (patch)
treeedc8fd8e428e6e61beb88e475c32d2978075bf88 /src/arch/arm/faults.cc
parent4d5d47c173d3e649c7e620481d18ea93a3e09e79 (diff)
downloadgem5-bce923c1891d85b9503523cb66fcf1511f30cd9d.tar.xz
arm: correctly assign faulting IPA's to HPFAR_EL2
This patch corrects IPA reporting if the translation faults in a stage 2 lookup. Change-Id: I0b914527f8a9f98a5e980a131cf9d03e5584b4e9
Diffstat (limited to 'src/arch/arm/faults.cc')
-rw-r--r--src/arch/arm/faults.cc12
1 files changed, 11 insertions, 1 deletions
diff --git a/src/arch/arm/faults.cc b/src/arch/arm/faults.cc
index 621076fe5..0a39dbba6 100644
--- a/src/arch/arm/faults.cc
+++ b/src/arch/arm/faults.cc
@@ -969,7 +969,17 @@ AbortFault<T>::invoke(ThreadContext *tc, const StaticInstPtr &inst)
} else { // AArch64
// Set the FAR register. Nothing else to do if we are in AArch64 state
// because the syndrome register has already been set inside invoke64()
- tc->setMiscReg(AbortFault<T>::getFaultAddrReg64(), faultAddr);
+ if (stage2) {
+ // stage 2 fault, set HPFAR_EL2 to the faulting IPA
+ // and FAR_EL2 to the Original VA
+ tc->setMiscReg(AbortFault<T>::getFaultAddrReg64(), OVAddr);
+ tc->setMiscReg(MISCREG_HPFAR_EL2, bits(faultAddr, 47, 12) << 4);
+
+ DPRINTF(Faults, "Abort Fault (Stage 2) VA: 0x%x IPA: 0x%x\n",
+ OVAddr, faultAddr);
+ } else {
+ tc->setMiscReg(AbortFault<T>::getFaultAddrReg64(), faultAddr);
+ }
}
}