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| author | Ali Saidi <Ali.Saidi@ARM.com> | 2010-06-02 12:58:16 -0500 |
|---|---|---|
| committer | Ali Saidi <Ali.Saidi@ARM.com> | 2010-06-02 12:58:16 -0500 |
| commit | cb9936cfdefdebf2c0b950f93a62d504d356524d (patch) | |
| tree | 3280784b875ccd23475c3f08edc774b50ef1c97d /src/arch/arm/faults.hh | |
| parent | f246be4cbc27b4173f6917b430a31b9a39cdb380 (diff) | |
| download | gem5-cb9936cfdefdebf2c0b950f93a62d504d356524d.tar.xz | |
ARM: Implement the ARM TLB/Tablewalker. Needs performance improvements.
Diffstat (limited to 'src/arch/arm/faults.hh')
| -rw-r--r-- | src/arch/arm/faults.hh | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/src/arch/arm/faults.hh b/src/arch/arm/faults.hh index 7e4013a85..6de9fee28 100644 --- a/src/arch/arm/faults.hh +++ b/src/arch/arm/faults.hh @@ -75,16 +75,17 @@ class ArmFault : public FaultBase Translation1 = 0x7, SynchronousExternalAbort0 = 0x8, Domain0 = 0x9, + SynchronousExternalAbort1 = 0xa, Domain1 = 0xb, - TranslationTableWalk0 = 0xc, + TranslationTableWalkExtAbt0 = 0xc, Permission0 = 0xd, - SynchronousExternalAbort1 = 0xe, + TranslationTableWalkExtAbt1 = 0xe, Permission1 = 0xf, AsynchronousExternalAbort = 0x16, MemoryAccessAsynchronousParityError = 0x18, MemoryAccessSynchronousParityError = 0x19, - TranslationTableWalk1 = 0x1c, - SynchronousParityError = 0x1e + TranslationTableWalkPrtyErr0 = 0x1c, + TranslationTableWalkPrtyErr1 = 0x1e, }; struct FaultVals @@ -208,7 +209,7 @@ class DataAbort : public AbortFault<DataAbort> static const MiscRegIndex FsrIndex = MISCREG_DFSR; static const MiscRegIndex FarIndex = MISCREG_DFAR; - DataAbort(Addr _addr, bool _write, uint8_t _domain, uint8_t _status) : + DataAbort(Addr _addr, uint8_t _domain, bool _write, uint8_t _status) : AbortFault<DataAbort>(_addr, _write, _domain, _status) {} }; |